{"id":"https://openalex.org/W2114504404","doi":"https://doi.org/10.1109/tvlsi.2012.2190433","title":"Low-Resolution DAC-Driven Linearity Testing of Higher Resolution ADCs Using Polynomial Fitting Measurements","display_name":"Low-Resolution DAC-Driven Linearity Testing of Higher Resolution ADCs Using Polynomial Fitting Measurements","publication_year":2013,"publication_date":"2013-02-20","ids":{"openalex":"https://openalex.org/W2114504404","doi":"https://doi.org/10.1109/tvlsi.2012.2190433","mag":"2114504404"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2012.2190433","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2012.2190433","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5037382420","display_name":"Sehun Kook","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Sehun Kook","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","Sch. of Electr. & Comput. Eng.,, Georgia Inst. of Technol., Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"Sch. of Electr. & Comput. Eng.,, Georgia Inst. of Technol., Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017180010","display_name":"Hyun Choi","orcid":"https://orcid.org/0000-0002-6963-3004"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hyun Woo Choi","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","Sch. of Electr. & Comput. Eng.,, Georgia Inst. of Technol., Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"Sch. of Electr. & Comput. Eng.,, Georgia Inst. of Technol., Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5069579193","display_name":"Abhijit Chatterjee","orcid":"https://orcid.org/0000-0003-1553-4470"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Abhijit Chatterjee","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","Sch. of Electr. & Comput. Eng.,, Georgia Inst. of Technol., Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"Sch. of Electr. & Comput. Eng.,, Georgia Inst. of Technol., Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5037382420"],"corresponding_institution_ids":["https://openalex.org/I130701444"],"apc_list":null,"apc_paid":null,"fwci":0.7994,"has_fulltext":false,"cited_by_count":19,"citation_normalized_percentile":{"value":0.73952174,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"21","issue":"3","first_page":"454","last_page":"464"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12300","display_name":"Advanced Electrical Measurement Techniques","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/linearity","display_name":"Linearity","score":0.7718033790588379},{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.6055833101272583},{"id":"https://openalex.org/keywords/histogram","display_name":"Histogram","score":0.5282365679740906},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5193508863449097},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4688882529735565},{"id":"https://openalex.org/keywords/effective-number-of-bits","display_name":"Effective number of bits","score":0.43689489364624023},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.42058494687080383},{"id":"https://openalex.org/keywords/polynomial","display_name":"Polynomial","score":0.4113995134830475},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3876810669898987},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.31592002511024475},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18573033809661865},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.14809831976890564},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.12046647071838379},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.11725872755050659},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.09019529819488525}],"concepts":[{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.7718033790588379},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.6055833101272583},{"id":"https://openalex.org/C53533937","wikidata":"https://www.wikidata.org/wiki/Q185020","display_name":"Histogram","level":3,"score":0.5282365679740906},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5193508863449097},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4688882529735565},{"id":"https://openalex.org/C16671190","wikidata":"https://www.wikidata.org/wiki/Q505579","display_name":"Effective number of bits","level":3,"score":0.43689489364624023},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.42058494687080383},{"id":"https://openalex.org/C90119067","wikidata":"https://www.wikidata.org/wiki/Q43260","display_name":"Polynomial","level":2,"score":0.4113995134830475},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3876810669898987},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.31592002511024475},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18573033809661865},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.14809831976890564},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.12046647071838379},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.11725872755050659},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.09019529819488525},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2012.2190433","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2012.2190433","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1494738794","https://openalex.org/W1550816954","https://openalex.org/W1604098070","https://openalex.org/W2014022260","https://openalex.org/W2038372383","https://openalex.org/W2068822021","https://openalex.org/W2084128131","https://openalex.org/W2098852797","https://openalex.org/W2099718450","https://openalex.org/W2111577171","https://openalex.org/W2113796007","https://openalex.org/W2114367267","https://openalex.org/W2128726980","https://openalex.org/W2129182275","https://openalex.org/W2131477866","https://openalex.org/W2134974905","https://openalex.org/W2146116573","https://openalex.org/W2150379246","https://openalex.org/W2161325091","https://openalex.org/W2163817444","https://openalex.org/W2213612645","https://openalex.org/W6682345522"],"related_works":["https://openalex.org/W2135927294","https://openalex.org/W2036729721","https://openalex.org/W1971842288","https://openalex.org/W2381695201","https://openalex.org/W2800004760","https://openalex.org/W4210291817","https://openalex.org/W2149148697","https://openalex.org/W2354856110","https://openalex.org/W2150379246","https://openalex.org/W2168668096"],"abstract_inverted_index":{"A":[0,102],"low-cost":[1,66,89],"linearity":[2,139],"test":[3,61,75,80,83,163],"methodology":[4],"for":[5,51,98],"high-resolution":[6,52,73],"analog-to-digital":[7],"converters":[8],"(ADCs)":[9],"is":[10,107,123,135],"presented":[11],"in":[12,79,148],"this":[13],"paper.":[14],"Linearity":[15],"testing":[16,49,150],"of":[17,38,114,129,140],"ADCs":[18,53],"requires":[19],"high-precision":[20],"digital-to-analog":[21],"conversion":[22],"(DAC)":[23],"capability,":[24],"commonly":[25],"3-bit":[26],"higher":[27],"resolution":[28],"than":[29,96],"the":[30,59,111,115,127,130,138,141,149,161],"ADC":[31,39,74,116,131],"under":[32,117],"test.":[33,101,118],"Further,":[34],"a":[35,72],"large":[36],"number":[37],"output":[40],"data":[41],"samples":[42],"must":[43],"be":[44],"collected":[45],"making":[46,93],"conventional":[47,99],"histogram":[48,100],"impractical":[50],"with":[54],"18-24":[55],"bit":[56],"precision.":[57],"In":[58],"proposed":[60,162],"methodology,":[62],"two":[63],"low-precision":[64],"and":[65,82,91,154],"DACs":[67],"are":[68,85,157],"used":[69,108,124,147],"to":[70,109,125,159],"generate":[71],"stimulus.":[76],"Significant":[77],"reductions":[78],"cost":[81],"time":[84],"achieved":[86],"by":[87,92],"using":[88],"instrumentation":[90],"fewer":[94],"measurements":[95],"required":[97],"least-squares-based":[103],"polynomial":[104],"fitting":[105],"approach":[106],"determine":[110],"transfer":[112,121],"function":[113,122],"The":[119],"generated":[120],"compute":[126],"non-linearity":[128],"accurately.":[132],"No":[133],"assumption":[134],"made":[136],"regarding":[137],"lower":[142],"precision":[143],"signal":[144],"generators":[145],"(DACs)":[146],"procedure.":[151],"Software":[152],"simulations":[153],"hardware":[155],"experiments":[156],"performed":[158],"validate":[160],"methodology.":[164]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
