{"id":"https://openalex.org/W2078512400","doi":"https://doi.org/10.1109/tvlsi.2011.2173770","title":"An FPGA Chip Identification Generator Using Configurable Ring Oscillators","display_name":"An FPGA Chip Identification Generator Using Configurable Ring Oscillators","publication_year":2011,"publication_date":"2011-11-28","ids":{"openalex":"https://openalex.org/W2078512400","doi":"https://doi.org/10.1109/tvlsi.2011.2173770","mag":"2078512400"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2011.2173770","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2011.2173770","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100892776","display_name":"Haile Yu","orcid":null},"institutions":[{"id":"https://openalex.org/I177725633","display_name":"Chinese University of Hong Kong","ror":"https://ror.org/00t33hh48","country_code":"HK","type":"education","lineage":["https://openalex.org/I177725633"]}],"countries":["HK"],"is_corresponding":false,"raw_author_name":"Haile Yu","raw_affiliation_strings":["Department of Computer Science and Engineering, Chinese University of Hong Kong, Shatin, Hong Kong, China","Dept. of Comput. Sci. & Eng., Chinese Univ. of Hong Kong, Shatin, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Chinese University of Hong Kong, Shatin, Hong Kong, China","institution_ids":["https://openalex.org/I177725633"]},{"raw_affiliation_string":"Dept. of Comput. Sci. & Eng., Chinese Univ. of Hong Kong, Shatin, China","institution_ids":["https://openalex.org/I177725633"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5107994859","display_name":"Philip H. W. Leong","orcid":"https://orcid.org/0000-0002-3923-3499"},"institutions":[{"id":"https://openalex.org/I129604602","display_name":"The University of Sydney","ror":"https://ror.org/0384j8v12","country_code":"AU","type":"education","lineage":["https://openalex.org/I129604602"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"Philip H. W. Leong","raw_affiliation_strings":["School of Electrical and Information Engineering, University of Sydney, Sydney, NSW, Australia","Sch. of Electr. & Inf. Eng., Univ. of Sydney, Sydney, NSW, Australia#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Information Engineering, University of Sydney, Sydney, NSW, Australia","institution_ids":["https://openalex.org/I129604602"]},{"raw_affiliation_string":"Sch. of Electr. & Inf. Eng., Univ. of Sydney, Sydney, NSW, Australia#TAB#","institution_ids":["https://openalex.org/I129604602"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5088556682","display_name":"Qiang Xu","orcid":"https://orcid.org/0000-0001-6747-126X"},"institutions":[{"id":"https://openalex.org/I177725633","display_name":"Chinese University of Hong Kong","ror":"https://ror.org/00t33hh48","country_code":"HK","type":"education","lineage":["https://openalex.org/I177725633"]}],"countries":["HK"],"is_corresponding":false,"raw_author_name":"Qiang Xu","raw_affiliation_strings":["Department of Computer Science and Engineering, Chinese University of Hong Kong, Shatin, Hong Kong, China","Dept. of Comput. Sci. & Eng., Chinese Univ. of Hong Kong, Shatin, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Chinese University of Hong Kong, Shatin, Hong Kong, China","institution_ids":["https://openalex.org/I177725633"]},{"raw_affiliation_string":"Dept. of Comput. Sci. & Eng., Chinese Univ. of Hong Kong, Shatin, China","institution_ids":["https://openalex.org/I177725633"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.2881,"has_fulltext":false,"cited_by_count":36,"citation_normalized_percentile":{"value":0.81535346,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":99},"biblio":{"volume":"20","issue":"12","first_page":"2198","last_page":"2207"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9944999814033508,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.992900013923645,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6856981515884399},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5470957159996033},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4955250024795532},{"id":"https://openalex.org/keywords/gate-array","display_name":"Gate array","score":0.47117048501968384},{"id":"https://openalex.org/keywords/initialization","display_name":"Initialization","score":0.47009965777397156},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4315037131309509},{"id":"https://openalex.org/keywords/generator","display_name":"Generator (circuit theory)","score":0.4195234775543213},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.30965983867645264},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2446117401123047},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2204817235469818},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.14275452494621277},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07956209778785706}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6856981515884399},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5470957159996033},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4955250024795532},{"id":"https://openalex.org/C114237110","wikidata":"https://www.wikidata.org/wiki/Q114901","display_name":"Gate array","level":3,"score":0.47117048501968384},{"id":"https://openalex.org/C114466953","wikidata":"https://www.wikidata.org/wiki/Q6034165","display_name":"Initialization","level":2,"score":0.47009965777397156},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4315037131309509},{"id":"https://openalex.org/C2780992000","wikidata":"https://www.wikidata.org/wiki/Q17016113","display_name":"Generator (circuit theory)","level":3,"score":0.4195234775543213},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.30965983867645264},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2446117401123047},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2204817235469818},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.14275452494621277},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07956209778785706},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tvlsi.2011.2173770","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2011.2173770","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.468.2887","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.468.2887","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cel.usyd.edu.au/people/philip.leong/UserFiles/File/papers/id_tvlsi12.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":29,"referenced_works":["https://openalex.org/W1515671919","https://openalex.org/W1823893401","https://openalex.org/W1973429805","https://openalex.org/W2051832398","https://openalex.org/W2065549026","https://openalex.org/W2080284304","https://openalex.org/W2084211711","https://openalex.org/W2088630761","https://openalex.org/W2101815940","https://openalex.org/W2102576814","https://openalex.org/W2104401100","https://openalex.org/W2113322447","https://openalex.org/W2116359098","https://openalex.org/W2116374153","https://openalex.org/W2124874986","https://openalex.org/W2126460857","https://openalex.org/W2130351941","https://openalex.org/W2138874069","https://openalex.org/W2142803377","https://openalex.org/W2148330234","https://openalex.org/W2169212403","https://openalex.org/W2171232284","https://openalex.org/W2171762889","https://openalex.org/W3145722221","https://openalex.org/W3147945423","https://openalex.org/W6630771808","https://openalex.org/W6675028928","https://openalex.org/W6676995458","https://openalex.org/W6679357471"],"related_works":["https://openalex.org/W2014165129","https://openalex.org/W2367348190","https://openalex.org/W594316872","https://openalex.org/W2831860248","https://openalex.org/W2367794224","https://openalex.org/W2072850836","https://openalex.org/W2017163657","https://openalex.org/W1968650434","https://openalex.org/W2105610663","https://openalex.org/W1996607072"],"abstract_inverted_index":{"Physically":[0],"unclonable":[1],"functions":[2],"(PUF)":[3],"are":[4],"commonly":[5],"used":[6],"in":[7,123],"applications":[8],"such":[9],"as":[10],"hardware":[11],"security":[12],"and":[13,61,104,120],"intellectual":[14],"property":[15],"protection.":[16],"Various":[17],"PUF":[18],"implementation":[19,70],"techniques":[20],"have":[21],"been":[22],"proposed":[23],"to":[24,36,66,96,134],"translate":[25],"chip-specific":[26],"variations":[27],"into":[28],"a":[29,45,72,100,108],"unique":[30],"binary":[31],"string.":[32],"It":[33],"is":[34,92,130],"difficult":[35],"maintain":[37],"repeatability":[38],"of":[39,48],"chip":[40],"ID":[41],"generation,":[42],"especially":[43],"over":[44],"wide":[46],"range":[47,119],"operating":[49],"conditions.":[50],"To":[51],"address":[52],"this":[53],"problem,":[54],"we":[55],"propose":[56],"utilizing":[57],"configurable":[58],"ring":[59],"oscillators":[60],"an":[62],"orthogonal":[63],"re-initialization":[64],"scheme":[65],"improve":[67],"repeatability.":[68],"An":[69],"on":[71,80],"Xilinx":[73],"Spartan-3e":[74],"field-programmable":[75],"gate":[76],"array":[77],"was":[78],"tested":[79],"nine":[81],"different":[82],"chips.":[83],"Experimental":[84],"results":[85],"show":[86],"that":[87],"the":[88,126],"bit":[89,127],"flip":[90,128],"rate":[91,129],"reduced":[93,131],"from":[94,132],"1.5%":[95],"approximately":[97],"0":[98],"at":[99],"fixed":[101],"supply":[102,124],"voltage":[103],"room":[105],"temperature.":[106],"Over":[107],"20":[109],"<sup":[110,114,136],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[111,115,137],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">\u00b0</sup>":[112,116],"C-80":[113],"C":[117],"temperature":[118],"25%":[121],"variation":[122],"voltage,":[125],"1.56%":[133],"3.125\u00d710":[135],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">-7</sup>":[138],".":[139]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
