{"id":"https://openalex.org/W2069308200","doi":"https://doi.org/10.1109/tvlsi.2011.2170204","title":"Real-Time Computation of Local Neighborhood Functions in Application-Specific Instruction-Set Processors","display_name":"Real-Time Computation of Local Neighborhood Functions in Application-Specific Instruction-Set Processors","publication_year":2011,"publication_date":"2011-10-31","ids":{"openalex":"https://openalex.org/W2069308200","doi":"https://doi.org/10.1109/tvlsi.2011.2170204","mag":"2069308200"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2011.2170204","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2011.2170204","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036083040","display_name":"Philippe Aubertin","orcid":null},"institutions":[{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]},{"id":"https://openalex.org/I29607241","display_name":"\u00c9cole Normale Sup\u00e9rieure - PSL","ror":"https://ror.org/05a0dhs15","country_code":"FR","type":"funder","lineage":["https://openalex.org/I2746051580","https://openalex.org/I29607241"]}],"countries":["CA","FR"],"is_corresponding":true,"raw_author_name":"Philippe Aubertin","raw_affiliation_strings":["Groupe de Recherche en Micro\u00e9lectronique et Microsyst\u00e9mes, \u00c9cole Polytechnique de Montr\u00e9al, Montreal, QUE, Canada","Groupe de Rech. en Microelectron. et Microsystemes, Ecole Polytech. de Montreal, Montre\u0301al, QC, Canada"],"affiliations":[{"raw_affiliation_string":"Groupe de Recherche en Micro\u00e9lectronique et Microsyst\u00e9mes, \u00c9cole Polytechnique de Montr\u00e9al, Montreal, QUE, Canada","institution_ids":["https://openalex.org/I45683168"]},{"raw_affiliation_string":"Groupe de Rech. en Microelectron. et Microsystemes, Ecole Polytech. de Montreal, Montre\u0301al, QC, Canada","institution_ids":["https://openalex.org/I29607241"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032933923","display_name":"J. M. Pierre Langlois","orcid":"https://orcid.org/0000-0003-1721-2520"},"institutions":[{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]},{"id":"https://openalex.org/I29607241","display_name":"\u00c9cole Normale Sup\u00e9rieure - PSL","ror":"https://ror.org/05a0dhs15","country_code":"FR","type":"funder","lineage":["https://openalex.org/I2746051580","https://openalex.org/I29607241"]}],"countries":["CA","FR"],"is_corresponding":false,"raw_author_name":"J. M. Pierre Langlois","raw_affiliation_strings":["Groupe de Recherche en Micro\u00e9lectronique et Microsyst\u00e9mes, \u00c9cole Polytechnique de Montr\u00e9al, Montreal, QUE, Canada","Groupe de Rech. en Microelectron. et Microsystemes, Ecole Polytech. de Montreal, Montre\u0301al, QC, Canada"],"affiliations":[{"raw_affiliation_string":"Groupe de Recherche en Micro\u00e9lectronique et Microsyst\u00e9mes, \u00c9cole Polytechnique de Montr\u00e9al, Montreal, QUE, Canada","institution_ids":["https://openalex.org/I45683168"]},{"raw_affiliation_string":"Groupe de Rech. en Microelectron. et Microsystemes, Ecole Polytech. de Montreal, Montre\u0301al, QC, Canada","institution_ids":["https://openalex.org/I29607241"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5038488044","display_name":"Yvon Savaria","orcid":"https://orcid.org/0000-0002-3404-9959"},"institutions":[{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]},{"id":"https://openalex.org/I29607241","display_name":"\u00c9cole Normale Sup\u00e9rieure - PSL","ror":"https://ror.org/05a0dhs15","country_code":"FR","type":"funder","lineage":["https://openalex.org/I2746051580","https://openalex.org/I29607241"]}],"countries":["CA","FR"],"is_corresponding":false,"raw_author_name":"Yvon Savaria","raw_affiliation_strings":["Groupe de Recherche en Micro\u00e9lectronique et Microsyst\u00e9mes, \u00c9cole Polytechnique de Montr\u00e9al, Montreal, QUE, Canada","Groupe de Rech. en Microelectron. et Microsystemes, Ecole Polytech. de Montreal, Montre\u0301al, QC, Canada"],"affiliations":[{"raw_affiliation_string":"Groupe de Recherche en Micro\u00e9lectronique et Microsyst\u00e9mes, \u00c9cole Polytechnique de Montr\u00e9al, Montreal, QUE, Canada","institution_ids":["https://openalex.org/I45683168"]},{"raw_affiliation_string":"Groupe de Rech. en Microelectron. et Microsystemes, Ecole Polytech. de Montreal, Montre\u0301al, QC, Canada","institution_ids":["https://openalex.org/I29607241"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5036083040"],"corresponding_institution_ids":["https://openalex.org/I29607241","https://openalex.org/I45683168"],"apc_list":null,"apc_paid":null,"fwci":1.5584,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.82990263,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":"20","issue":"11","first_page":"2031","last_page":"2043"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8301522135734558},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.7643217444419861},{"id":"https://openalex.org/keywords/memory-bandwidth","display_name":"Memory bandwidth","score":0.6867566704750061},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6414117813110352},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.5875015258789062},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.5302188992500305},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.5186694860458374},{"id":"https://openalex.org/keywords/kernel","display_name":"Kernel (algebra)","score":0.5015730857849121},{"id":"https://openalex.org/keywords/convolution","display_name":"Convolution (computer science)","score":0.46267908811569214},{"id":"https://openalex.org/keywords/high-memory","display_name":"High memory","score":0.4284650683403015},{"id":"https://openalex.org/keywords/instruction-level-parallelism","display_name":"Instruction-level parallelism","score":0.4255087375640869},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.41709086298942566},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.34558501839637756},{"id":"https://openalex.org/keywords/parallelism","display_name":"Parallelism (grammar)","score":0.19860932230949402},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.11115369200706482}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8301522135734558},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.7643217444419861},{"id":"https://openalex.org/C188045654","wikidata":"https://www.wikidata.org/wiki/Q17148339","display_name":"Memory bandwidth","level":2,"score":0.6867566704750061},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6414117813110352},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.5875015258789062},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.5302188992500305},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.5186694860458374},{"id":"https://openalex.org/C74193536","wikidata":"https://www.wikidata.org/wiki/Q574844","display_name":"Kernel (algebra)","level":2,"score":0.5015730857849121},{"id":"https://openalex.org/C45347329","wikidata":"https://www.wikidata.org/wiki/Q5166604","display_name":"Convolution (computer science)","level":3,"score":0.46267908811569214},{"id":"https://openalex.org/C2781357197","wikidata":"https://www.wikidata.org/wiki/Q5757597","display_name":"High memory","level":2,"score":0.4284650683403015},{"id":"https://openalex.org/C140763907","wikidata":"https://www.wikidata.org/wiki/Q2714055","display_name":"Instruction-level parallelism","level":3,"score":0.4255087375640869},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.41709086298942566},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.34558501839637756},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.19860932230949402},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.11115369200706482},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tvlsi.2011.2170204","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2011.2170204","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},{"id":"pmh:oai:publications.polymtl.ca:15861","is_oa":false,"landing_page_url":"https://publications.polymtl.ca/15861/","pdf_url":null,"source":{"id":"https://openalex.org/S4306401013","display_name":"PolyPublie (\u00c9cole Polytechnique de Montr\u00e9al)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I45683168","host_organization_name":"Polytechnique Montr\u00e9al","host_organization_lineage":["https://openalex.org/I45683168"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Article de revue"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.9100000262260437,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320310709","display_name":"CMC Microsystems","ror":"https://ror.org/03k70ea39"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":32,"referenced_works":["https://openalex.org/W1577039630","https://openalex.org/W1585158103","https://openalex.org/W1984448098","https://openalex.org/W1990515723","https://openalex.org/W2000619624","https://openalex.org/W2000911569","https://openalex.org/W2027350882","https://openalex.org/W2028637730","https://openalex.org/W2051498260","https://openalex.org/W2097265665","https://openalex.org/W2098255227","https://openalex.org/W2098755842","https://openalex.org/W2101361758","https://openalex.org/W2103618033","https://openalex.org/W2113944047","https://openalex.org/W2115567121","https://openalex.org/W2116495135","https://openalex.org/W2118159862","https://openalex.org/W2118559083","https://openalex.org/W2121327543","https://openalex.org/W2135252045","https://openalex.org/W2145206281","https://openalex.org/W2148631003","https://openalex.org/W2153506856","https://openalex.org/W2154928714","https://openalex.org/W2163284562","https://openalex.org/W2168256010","https://openalex.org/W2171697422","https://openalex.org/W2276193635","https://openalex.org/W3010246015","https://openalex.org/W3192002045","https://openalex.org/W6674708768"],"related_works":["https://openalex.org/W2045177269","https://openalex.org/W2116582200","https://openalex.org/W4376647684","https://openalex.org/W1580752477","https://openalex.org/W2061453039","https://openalex.org/W4221139464","https://openalex.org/W2042635039","https://openalex.org/W4313066767","https://openalex.org/W1972260469","https://openalex.org/W1897551170"],"abstract_inverted_index":{"This":[0,85],"paper":[1],"presents":[2],"a":[3,71,81,88],"systematic":[4],"approach":[5,35,114],"to":[6,53,79,87,92],"the":[7,42,49,54,93,112],"design":[8,113],"of":[9,17,30,41,61],"application-specific":[10,65],"instruction-set":[11],"processors":[12],"for":[13],"high":[14,31],"speed":[15,90],"computation":[16],"local":[18],"neighborhood":[19],"functions":[20],"and":[21,64,105,120,128,130,137],"intra-field":[22,102],"deinterlacing.":[23],"The":[24,34],"intended":[25],"application":[26],"is":[27,67],"real-time":[28],"processing":[29,89],"definition":[32],"video.":[33],"aims":[36],"at":[37],"an":[38],"efficient":[39],"utilization":[40],"available":[43],"memory":[44,97],"bandwidth":[45,98],"by":[46,96],"fully":[47],"exploiting":[48],"data":[50],"parallelism":[51],"inherent":[52],"target":[55],"algorithm":[56],"class.":[57],"An":[58],"appropriate":[59],"choice":[60],"custom":[62],"instructions":[63],"registers":[66],"used":[68],"together":[69],"with":[70,108],"very":[72],"long":[73],"instruction":[74],"word":[75],"architecture":[76],"in":[77],"order":[78],"mimic":[80],"pipelined":[82],"systolic":[83],"array.":[84],"leads":[86],"close":[91],"limit":[94],"imposed":[95],"constraints.":[99],"For":[100],"three":[101],"deinterlacing":[103],"algorithms":[104],"2-D":[106],"convolution":[107],"four":[109],"kernel":[110],"sizes,":[111],"yields":[115],"speedup":[116],"factors":[117,134],"between":[118,126,135],"36":[119],"1330,":[121],"Area-Time":[122],"(AT)":[123],"product":[124],"improvements":[125],"12\u00d7":[127],"243\u00d7,":[129],"energy":[131],"consumption":[132],"reduction":[133],"13":[136],"262.":[138]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":2}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}
