{"id":"https://openalex.org/W1996048505","doi":"https://doi.org/10.1109/tvlsi.2011.2169686","title":"Compact Current Source Models for Timing Analysis Under Temperature and Body Bias Variations","display_name":"Compact Current Source Models for Timing Analysis Under Temperature and Body Bias Variations","publication_year":2011,"publication_date":"2011-10-19","ids":{"openalex":"https://openalex.org/W1996048505","doi":"https://doi.org/10.1109/tvlsi.2011.2169686","mag":"1996048505"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2011.2169686","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2011.2169686","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5043629600","display_name":"Saket Gupta","orcid":"https://orcid.org/0000-0003-4541-5798"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Saket Gupta","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA","Dept. of Electr. & Comput. Eng, Univ. of Minnesota, Minneapolis, MN, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng, Univ. of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068714995","display_name":"Sachin S. Sapatnekar","orcid":"https://orcid.org/0000-0002-5353-2364"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sachin S. Sapatnekar","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA","Dept. of Electr. & Comput. Eng, Univ. of Minnesota, Minneapolis, MN, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng, Univ. of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5043629600"],"corresponding_institution_ids":["https://openalex.org/I130238516"],"apc_list":null,"apc_paid":null,"fwci":0.5399,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.69435208,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"20","issue":"11","first_page":"2104","last_page":"2117"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.7528881430625916},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.66789311170578},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.49733737111091614},{"id":"https://openalex.org/keywords/biasing","display_name":"Biasing","score":0.48236483335494995},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.479953795671463},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.45930373668670654},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.3904876410961151},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.34506112337112427},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.30077487230300903},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.2204102873802185},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.09536746144294739},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.09505707025527954}],"concepts":[{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.7528881430625916},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.66789311170578},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.49733737111091614},{"id":"https://openalex.org/C20254490","wikidata":"https://www.wikidata.org/wiki/Q719550","display_name":"Biasing","level":3,"score":0.48236483335494995},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.479953795671463},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.45930373668670654},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.3904876410961151},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.34506112337112427},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.30077487230300903},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2204102873802185},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.09536746144294739},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.09505707025527954},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tvlsi.2011.2169686","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2011.2169686","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.300.9859","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.300.9859","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ee.umn.edu/users/sachin/jnl/tvlsi11sg.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":31,"referenced_works":["https://openalex.org/W1514601727","https://openalex.org/W1537765568","https://openalex.org/W1547254974","https://openalex.org/W1661368752","https://openalex.org/W1968992562","https://openalex.org/W2006619614","https://openalex.org/W2031705561","https://openalex.org/W2106251971","https://openalex.org/W2108049334","https://openalex.org/W2108816571","https://openalex.org/W2110283673","https://openalex.org/W2112918184","https://openalex.org/W2114252285","https://openalex.org/W2122818120","https://openalex.org/W2133268384","https://openalex.org/W2133276614","https://openalex.org/W2136586884","https://openalex.org/W2142202849","https://openalex.org/W2142659896","https://openalex.org/W2145091135","https://openalex.org/W2146410479","https://openalex.org/W2150526221","https://openalex.org/W2156480805","https://openalex.org/W2498647973","https://openalex.org/W3145469858","https://openalex.org/W4206436503","https://openalex.org/W4245501382","https://openalex.org/W4249030878","https://openalex.org/W4249950459","https://openalex.org/W6676633326","https://openalex.org/W6681287237"],"related_works":["https://openalex.org/W2058965144","https://openalex.org/W2164382479","https://openalex.org/W2146343568","https://openalex.org/W98480971","https://openalex.org/W2150291671","https://openalex.org/W2013643406","https://openalex.org/W2027972911","https://openalex.org/W2157978810","https://openalex.org/W2597809628","https://openalex.org/W1965165143"],"abstract_inverted_index":{"State-of-the-art":[0],"timing":[1,78,133],"tools":[2],"are":[3],"built":[4],"around":[5],"the":[6,23,54],"use":[7],"of":[8,25,56,74,122,153,169,173,180],"current":[9],"source":[10],"models":[11,46],"(CSMs),":[12],"which":[13],"have":[14],"proven":[15],"to":[16,33,43,47,66,76,100,163],"be":[17],"fast":[18,126],"and":[19,35,52,84,105,124,127,139,159,177],"accurate":[20],"in":[21,87,156],"enabling":[22],"analysis":[24,79],"large":[26,89],"circuits.":[27],"As":[28],"circuits":[29],"become":[30],"increasingly":[31],"exposed":[32],"process":[34],"temperature":[36,106,140],"variations,":[37],"there":[38],"is":[39,64],"a":[40,60,71,97,109,116,125,143,167,178],"strong":[41],"need":[42],"augment":[44],"these":[45],"account":[48],"for":[49,53,92,120,132],"thermal":[50],"effects":[51,107],"impact":[55],"adaptive":[57],"body":[58,82,103,137],"biasing,":[59],"compensatory":[61],"technique":[62],"that":[63],"used":[65],"overcome":[67],"on-chip":[68],"variations.":[69],"However,":[70],"straightforward":[72],"extension":[73],"CSMs":[75],"incorporate":[77],"at":[80],"multiple":[81],"biases":[83],"temperatures":[85],"results":[86],"unreasonably":[88],"characterization":[90],"tables":[91,123],"each":[93],"cell.":[94],"We":[95,165],"propose":[96],"new":[98],"approach":[99,114],"compactly":[101],"capture":[102],"bias":[104,138],"within":[108],"mainstream":[110],"CSM":[111],"framework.":[112],"Our":[113],"features":[115],"table":[117],"reduction":[118],"method":[119,131],"compaction":[121],"novel":[128],"waveform":[129],"sensitivity":[130],"evaluation":[134],"under":[135,154],"any":[136],"condition.":[141],"On":[142],"45-nm":[144],"technology,":[145],"we":[146],"demonstrate":[147],"high":[148],"accuracy,":[149],"with":[150],"mean":[151],"errors":[152],"4%":[155],"both":[157],"slew":[158],"delay":[160],"as":[161],"compared":[162],"HSPICE.":[164],"show":[166],"speedup":[168,179],"over":[170,175,188],"five":[171],"orders":[172],"magnitude":[174],"HSPICE":[176],"about":[181],"<formula":[182],"formulatype=\"inline\"":[183],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[184],"xmlns:xlink=\"http://www.w3.org/1999/xlink\"><tex":[185],"Notation=\"TeX\">$92\\times$</tex>":[186],"</formula>":[187],"conventional":[189],"CSMs.":[190]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":6},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":2}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}