{"id":"https://openalex.org/W1993672111","doi":"https://doi.org/10.1109/tvlsi.2011.2162257","title":"On-Chip Measurement System for Within-Die Delay Variation of Individual Standard Cells in 65-nm CMOS","display_name":"On-Chip Measurement System for Within-Die Delay Variation of Individual Standard Cells in 65-nm CMOS","publication_year":2011,"publication_date":"2011-08-31","ids":{"openalex":"https://openalex.org/W1993672111","doi":"https://doi.org/10.1109/tvlsi.2011.2162257","mag":"1993672111"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2011.2162257","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2011.2162257","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100327456","display_name":"Xin Zhang","orcid":"https://orcid.org/0009-0009-2502-2840"},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Xin Zhang","raw_affiliation_strings":["Institute of Industrial Science, University of Tokyo, Tokyo, Japan","Inst. of Ind. Sci., Univ. of Tokyo, Tokyo, Japan"],"affiliations":[{"raw_affiliation_string":"Institute of Industrial Science, University of Tokyo, Tokyo, Japan","institution_ids":[]},{"raw_affiliation_string":"Inst. of Ind. Sci., Univ. of Tokyo, Tokyo, Japan","institution_ids":["https://openalex.org/I74801974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087315408","display_name":"Koichi Ishida","orcid":"https://orcid.org/0000-0002-4152-1203"},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Koichi Ishida","raw_affiliation_strings":["Institute of Industrial Science, University of Tokyo, Tokyo, Japan","Inst. of Ind. Sci., Univ. of Tokyo, Tokyo, Japan"],"affiliations":[{"raw_affiliation_string":"Institute of Industrial Science, University of Tokyo, Tokyo, Japan","institution_ids":[]},{"raw_affiliation_string":"Inst. of Ind. Sci., Univ. of Tokyo, Tokyo, Japan","institution_ids":["https://openalex.org/I74801974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004321250","display_name":"Hiroshi Fuketa","orcid":"https://orcid.org/0000-0003-0171-6679"},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Hiroshi Fuketa","raw_affiliation_strings":["Institute of Industrial Science, University of Tokyo, Tokyo, Japan","Inst. of Ind. Sci., Univ. of Tokyo, Tokyo, Japan"],"affiliations":[{"raw_affiliation_string":"Institute of Industrial Science, University of Tokyo, Tokyo, Japan","institution_ids":[]},{"raw_affiliation_string":"Inst. of Ind. Sci., Univ. of Tokyo, Tokyo, Japan","institution_ids":["https://openalex.org/I74801974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003282110","display_name":"Makoto Takamiya","orcid":"https://orcid.org/0000-0003-0289-7790"},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Makoto Takamiya","raw_affiliation_strings":["Institute of Industrial Science, University of Tokyo, Tokyo, Japan","Inst. of Ind. Sci., Univ. of Tokyo, Tokyo, Japan"],"affiliations":[{"raw_affiliation_string":"Institute of Industrial Science, University of Tokyo, Tokyo, Japan","institution_ids":[]},{"raw_affiliation_string":"Inst. of Ind. Sci., Univ. of Tokyo, Tokyo, Japan","institution_ids":["https://openalex.org/I74801974"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5112189116","display_name":"Takayasu Sakurai","orcid":null},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Takayasu Sakurai","raw_affiliation_strings":["Institute of Industrial Science, University of Tokyo, Tokyo, Japan","Inst. of Ind. Sci., Univ. of Tokyo, Tokyo, Japan"],"affiliations":[{"raw_affiliation_string":"Institute of Industrial Science, University of Tokyo, Tokyo, Japan","institution_ids":[]},{"raw_affiliation_string":"Inst. of Ind. Sci., Univ. of Tokyo, Tokyo, Japan","institution_ids":["https://openalex.org/I74801974"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5100327456"],"corresponding_institution_ids":["https://openalex.org/I74801974"],"apc_list":null,"apc_paid":null,"fwci":0.2098,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.5552023,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"20","issue":"10","first_page":"1876","last_page":"1880"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7871874570846558},{"id":"https://openalex.org/keywords/die","display_name":"Die (integrated circuit)","score":0.597891092300415},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5895552635192871},{"id":"https://openalex.org/keywords/oscilloscope","display_name":"Oscilloscope","score":0.573926568031311},{"id":"https://openalex.org/keywords/monte-carlo-method","display_name":"Monte Carlo method","score":0.5389538407325745},{"id":"https://openalex.org/keywords/standard-deviation","display_name":"Standard deviation","score":0.5162332057952881},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.513209342956543},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4631615877151489},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.4456920921802521},{"id":"https://openalex.org/keywords/waveform","display_name":"Waveform","score":0.4209219813346863},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.41515541076660156},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4069034159183502},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.3579508066177368},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3050200939178467},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.27764296531677246},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.221237450838089},{"id":"https://openalex.org/keywords/detector","display_name":"Detector","score":0.16901344060897827},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.14051106572151184},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1352006494998932},{"id":"https://openalex.org/keywords/statistics","display_name":"Statistics","score":0.08587610721588135}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7871874570846558},{"id":"https://openalex.org/C111106434","wikidata":"https://www.wikidata.org/wiki/Q1072430","display_name":"Die (integrated circuit)","level":2,"score":0.597891092300415},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5895552635192871},{"id":"https://openalex.org/C184026988","wikidata":"https://www.wikidata.org/wiki/Q174320","display_name":"Oscilloscope","level":3,"score":0.573926568031311},{"id":"https://openalex.org/C19499675","wikidata":"https://www.wikidata.org/wiki/Q232207","display_name":"Monte Carlo method","level":2,"score":0.5389538407325745},{"id":"https://openalex.org/C22679943","wikidata":"https://www.wikidata.org/wiki/Q159375","display_name":"Standard deviation","level":2,"score":0.5162332057952881},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.513209342956543},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4631615877151489},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.4456920921802521},{"id":"https://openalex.org/C197424946","wikidata":"https://www.wikidata.org/wiki/Q1165717","display_name":"Waveform","level":3,"score":0.4209219813346863},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.41515541076660156},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4069034159183502},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.3579508066177368},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3050200939178467},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.27764296531677246},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.221237450838089},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.16901344060897827},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.14051106572151184},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1352006494998932},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.08587610721588135},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2011.2162257","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2011.2162257","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1487984748","https://openalex.org/W1572287951","https://openalex.org/W1975790448","https://openalex.org/W2042809000","https://openalex.org/W2072077203","https://openalex.org/W2099320289","https://openalex.org/W2108271947","https://openalex.org/W2115150721","https://openalex.org/W2118477157","https://openalex.org/W2127567917","https://openalex.org/W2140823559","https://openalex.org/W2141592563","https://openalex.org/W2155636448","https://openalex.org/W2159801533","https://openalex.org/W2167707504","https://openalex.org/W2268136522","https://openalex.org/W3143079914","https://openalex.org/W4285719527","https://openalex.org/W6677325421","https://openalex.org/W6681436805"],"related_works":["https://openalex.org/W1972598373","https://openalex.org/W2364019159","https://openalex.org/W1489049788","https://openalex.org/W2243648136","https://openalex.org/W2370764016","https://openalex.org/W3087970328","https://openalex.org/W2355173512","https://openalex.org/W2125414987","https://openalex.org/W3005558969","https://openalex.org/W2129294024"],"abstract_inverted_index":{"New":[0],"measurement":[1,16],"system":[2,17],"for":[3,60,126],"characterizing":[4],"within-die":[5,66],"delay":[6,25,67,85,113],"variations":[7,26,114],"of":[8,36,52,65,81,87,93,97,102,119],"individual":[9,37],"standard":[10,53,94,121],"cells":[11,54,122],"is":[12,123],"presented.":[13],"The":[14,78],"proposed":[15,104],"are":[18,55,76,86],"able":[19],"to":[20,90],"characterize":[21],"rising":[22,82,110],"and":[23,33,71,83,111,115],"falling":[24,84,112],"separately":[27],"by":[28],"directly":[29],"measuring":[30],"the":[31,91,103,106,109,116,120,127],"input":[32],"output":[34],"waveforms":[35],"gate":[38],"using":[39],"an":[40],"on-chip":[41],"sampling":[42],"oscilloscope":[43],"in":[44],"65":[45],"nm":[46],"1.2V":[47],"CMOS":[48],"process.":[49,99],"Seven":[50],"types":[51],"measured":[56,70,79],"with":[57],"60":[58],"DUTs":[59],"each":[61],"type.":[62],"Good":[63],"correlations":[64],"distributions":[68],"between":[69,108],"Monte":[72],"Carlo":[73],"simulated":[74],"results":[75,80],"observed.":[77],"great":[88],"use":[89],"modeling":[92],"cell":[95],"library":[96],"deep-submicrometer":[98],"By":[100],"virtue":[101],"scheme,":[105],"relationship":[107],"active":[117],"area":[118],"experimentally":[124],"shown":[125],"first":[128],"time.":[129]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
