{"id":"https://openalex.org/W2139728303","doi":"https://doi.org/10.1109/tvlsi.2011.2161785","title":"Testing Methodology of Embedded DRAMs","display_name":"Testing Methodology of Embedded DRAMs","publication_year":2011,"publication_date":"2011-09-12","ids":{"openalex":"https://openalex.org/W2139728303","doi":"https://doi.org/10.1109/tvlsi.2011.2161785","mag":"2139728303"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2011.2161785","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2011.2161785","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100642435","display_name":"Haoyu Yang","orcid":"https://orcid.org/0000-0002-4709-0061"},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Hao-Yu Yang","raw_affiliation_strings":["Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan","Dept. of Electron. Eng, Nat. Chiao Tung Univ, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Dept. of Electron. Eng, Nat. Chiao Tung Univ, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102582494","display_name":"Chi-Min Chang","orcid":"https://orcid.org/0009-0001-9802-9420"},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chi-Min Chang","raw_affiliation_strings":["Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan","Dept. of Electron. Eng, Nat. Chiao Tung Univ, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Dept. of Electron. Eng, Nat. Chiao Tung Univ, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045156360","display_name":"Mango C.-T. Chao","orcid":"https://orcid.org/0000-0002-7299-9015"},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Mango C.-T. Chao","raw_affiliation_strings":["Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan","Dept. of Electron. Eng, Nat. Chiao Tung Univ, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Dept. of Electron. Eng, Nat. Chiao Tung Univ, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051484648","display_name":"Rei-Fu Huang","orcid":null},"institutions":[{"id":"https://openalex.org/I173632517","display_name":"MediaTek (China)","ror":"https://ror.org/05xvgy636","country_code":"CN","type":"company","lineage":["https://openalex.org/I173632517","https://openalex.org/I4210148979"]},{"id":"https://openalex.org/I4210148979","display_name":"MediaTek (Taiwan)","ror":"https://ror.org/05g9jck81","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210148979"]}],"countries":["CN","TW"],"is_corresponding":false,"raw_author_name":"Rei-Fu Huang","raw_affiliation_strings":["MediaTek, Inc., Hsinchu, Taiwan",", Mediatek Inc., Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"MediaTek, Inc., Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210148979"]},{"raw_affiliation_string":", Mediatek Inc., Hsinchu, Taiwan","institution_ids":["https://openalex.org/I173632517"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5081673593","display_name":"Shih-Chin Lin","orcid":null},"institutions":[{"id":"https://openalex.org/I4210161555","display_name":"United Microelectronics (Taiwan)","ror":"https://ror.org/0580qje17","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210161555"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Shih-Chin Lin","raw_affiliation_strings":["United Microelectronics Corporation Limited, Hsinchu, Taiwan","United Microelectron. Corp., Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"United Microelectronics Corporation Limited, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210161555"]},{"raw_affiliation_string":"United Microelectron. Corp., Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210161555"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5100642435"],"corresponding_institution_ids":["https://openalex.org/I148366613"],"apc_list":null,"apc_paid":null,"fwci":0.7556,"has_fulltext":false,"cited_by_count":24,"citation_normalized_percentile":{"value":0.74429703,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"20","issue":"9","first_page":"1715","last_page":"1728"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.9035279750823975},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7671928405761719},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5235580801963806},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.5059482455253601},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4644275903701782},{"id":"https://openalex.org/keywords/universal-memory","display_name":"Universal memory","score":0.43702441453933716},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.42876797914505005},{"id":"https://openalex.org/keywords/fault-injection","display_name":"Fault injection","score":0.4216304421424866},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.4130643904209137},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3604618012905121},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.31999027729034424},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.1693149209022522},{"id":"https://openalex.org/keywords/memory-refresh","display_name":"Memory refresh","score":0.11483901739120483},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.09811040759086609},{"id":"https://openalex.org/keywords/computer-memory","display_name":"Computer memory","score":0.07576432824134827}],"concepts":[{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.9035279750823975},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7671928405761719},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5235580801963806},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.5059482455253601},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4644275903701782},{"id":"https://openalex.org/C195053848","wikidata":"https://www.wikidata.org/wiki/Q7894141","display_name":"Universal memory","level":5,"score":0.43702441453933716},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.42876797914505005},{"id":"https://openalex.org/C2775928411","wikidata":"https://www.wikidata.org/wiki/Q2041312","display_name":"Fault injection","level":3,"score":0.4216304421424866},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.4130643904209137},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3604618012905121},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.31999027729034424},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.1693149209022522},{"id":"https://openalex.org/C87907426","wikidata":"https://www.wikidata.org/wiki/Q6815755","display_name":"Memory refresh","level":4,"score":0.11483901739120483},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.09811040759086609},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.07576432824134827},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2011.2161785","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2011.2161785","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1501897628","https://openalex.org/W1509465067","https://openalex.org/W1595937667","https://openalex.org/W1604482631","https://openalex.org/W1661368752","https://openalex.org/W1922040173","https://openalex.org/W2040381583","https://openalex.org/W2069406659","https://openalex.org/W2072772527","https://openalex.org/W2094190583","https://openalex.org/W2106935654","https://openalex.org/W2109356829","https://openalex.org/W2111475681","https://openalex.org/W2112794143","https://openalex.org/W2128563080","https://openalex.org/W2131862714","https://openalex.org/W2142661102","https://openalex.org/W2146707697","https://openalex.org/W2151998436","https://openalex.org/W2153397284","https://openalex.org/W2156748177","https://openalex.org/W2163231535","https://openalex.org/W2163518473","https://openalex.org/W4244759228","https://openalex.org/W6635700176"],"related_works":["https://openalex.org/W2433923775","https://openalex.org/W3006277082","https://openalex.org/W2516517078","https://openalex.org/W1974599144","https://openalex.org/W4327926368","https://openalex.org/W2150909864","https://openalex.org/W3146763006","https://openalex.org/W2582197177","https://openalex.org/W2767807890","https://openalex.org/W3015923041"],"abstract_inverted_index":{"The":[0,113],"embedded-DRAM":[1],"(eDRAM)":[2],"testing":[3,11,14],"mixes":[4],"up":[5],"the":[6,46,62,70,76,88,96],"techniques":[7],"used":[8,106],"for":[9,39],"DRAM":[10,20],"and":[12,74],"SRAM":[13,24],"since":[15],"an":[16,23,123],"eDRAM":[17,40,63,126],"core":[18],"combines":[19],"cells":[21],"with":[22,122],"interface":[25],"(the":[26],"so-called":[27],"1T-SRAM":[28],"architecture).":[29],"In":[30],"this":[31],"paper,":[32],"we":[33,59,81],"first":[34],"present":[35],"our":[36],"test":[37,61,72],"algorithm":[38],"testing.":[41],"A":[42],"theoretical":[43],"analysis":[44],"to":[45,68,86,110],"leakage":[47],"mechanisms":[48],"of":[49,98],"a":[50,65,83,103],"switch":[51],"transistor":[52],"is":[53,102],"also":[54],"provided,":[55],"based":[56,118],"on":[57,119],"that":[58],"can":[60],"at":[64],"higher":[66],"temperature":[67],"reduce":[69],"total":[71],"time":[73],"maintain":[75],"same":[77],"retention-fault":[78],"coverage.":[79],"Finally,":[80],"propose":[82],"mathematical":[84],"model":[85],"estimate":[87],"defect":[89],"level":[90],"caused":[91],"by":[92],"wear-out":[93],"defects":[94],"under":[95],"use":[97],"error-correction-code":[99],"circuitry,":[100],"which":[101],"special":[104],"function":[105],"in":[107],"eDRAMs":[108],"compared":[109],"commodity":[111],"DRAMs.":[112],"experimental":[114],"results":[115],"are":[116],"collected":[117],"1-lot":[120],"wafers":[121],"16":[124],"Mb":[125],"core.":[127]},"counts_by_year":[{"year":2025,"cited_by_count":5},{"year":2024,"cited_by_count":3},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
