{"id":"https://openalex.org/W2011883403","doi":"https://doi.org/10.1109/tvlsi.2011.2159633","title":"Jitter Analysis of Polyphase Filter-Based Multiphase Clock in Frequency Multiplier","display_name":"Jitter Analysis of Polyphase Filter-Based Multiphase Clock in Frequency Multiplier","publication_year":2011,"publication_date":"2011-07-21","ids":{"openalex":"https://openalex.org/W2011883403","doi":"https://doi.org/10.1109/tvlsi.2011.2159633","mag":"2011883403"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2011.2159633","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2011.2159633","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111972050","display_name":"Jee Khoi Yin","orcid":null},"institutions":[{"id":"https://openalex.org/I115228651","display_name":"Agency for Science, Technology and Research","ror":"https://ror.org/036wvzt09","country_code":"SG","type":"government","lineage":["https://openalex.org/I115228651"]},{"id":"https://openalex.org/I3005327000","display_name":"Institute for Infocomm Research","ror":"https://ror.org/053rfa017","country_code":"SG","type":"facility","lineage":["https://openalex.org/I115228651","https://openalex.org/I3005327000","https://openalex.org/I91275662"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Jee Khoi Yin","raw_affiliation_strings":["Institute for Infocomm Research, Agency for Science, Technology, and Research (ASTAR), Singapore","Institute for Infocomm Research, A*STAR,Singapore,Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute for Infocomm Research, Agency for Science, Technology, and Research (ASTAR), Singapore","institution_ids":["https://openalex.org/I3005327000","https://openalex.org/I115228651"]},{"raw_affiliation_string":"Institute for Infocomm Research, A*STAR,Singapore,Singapore","institution_ids":["https://openalex.org/I3005327000","https://openalex.org/I115228651"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5083943085","display_name":"P.K. Chan","orcid":"https://orcid.org/0000-0002-9205-0819"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"P. K. Chan","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, , Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, , Singapore","institution_ids":["https://openalex.org/I172675005"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.8109,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.75398169,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"20","issue":"8","first_page":"1373","last_page":"1382"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.9523083567619324},{"id":"https://openalex.org/keywords/polyphase-system","display_name":"Polyphase system","score":0.6907055377960205},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6556581854820251},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5533457398414612},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.5154002904891968},{"id":"https://openalex.org/keywords/cpu-multiplier","display_name":"CPU multiplier","score":0.4439641237258911},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.24391090869903564},{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.20804500579833984},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18086498975753784}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.9523083567619324},{"id":"https://openalex.org/C96157337","wikidata":"https://www.wikidata.org/wiki/Q391639","display_name":"Polyphase system","level":2,"score":0.6907055377960205},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6556581854820251},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5533457398414612},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.5154002904891968},{"id":"https://openalex.org/C125576049","wikidata":"https://www.wikidata.org/wiki/Q2246273","display_name":"CPU multiplier","level":5,"score":0.4439641237258911},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.24391090869903564},{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.20804500579833984},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18086498975753784},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tvlsi.2011.2159633","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2011.2159633","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},{"id":"pmh:oai:dr.ntu.edu.sg:10356/98674","is_oa":false,"landing_page_url":"http://hdl.handle.net/10220/16542","pdf_url":null,"source":{"id":"https://openalex.org/S4306402609","display_name":"DR-NTU (Nanyang Technological University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I172675005","host_organization_name":"Nanyang Technological University","host_organization_lineage":["https://openalex.org/I172675005"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Journal Article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320334744","display_name":"Institute for Infocomm Research","ror":"https://ror.org/053rfa017"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W146784561","https://openalex.org/W1585651733","https://openalex.org/W1775840686","https://openalex.org/W1989743371","https://openalex.org/W2005421687","https://openalex.org/W2009675739","https://openalex.org/W2039706313","https://openalex.org/W2065318410","https://openalex.org/W2095624237","https://openalex.org/W2097357112","https://openalex.org/W2097388262","https://openalex.org/W2098317737","https://openalex.org/W2101597431","https://openalex.org/W2108647531","https://openalex.org/W2111053525","https://openalex.org/W2123838469","https://openalex.org/W2129147891","https://openalex.org/W2130648546","https://openalex.org/W2137027172","https://openalex.org/W2143232235","https://openalex.org/W2155850749","https://openalex.org/W2165547580","https://openalex.org/W2172171491","https://openalex.org/W2175184221","https://openalex.org/W2181651087","https://openalex.org/W2788680135","https://openalex.org/W6674559331"],"related_works":["https://openalex.org/W4243016812","https://openalex.org/W2384124522","https://openalex.org/W2364484574","https://openalex.org/W2035322460","https://openalex.org/W1574257586","https://openalex.org/W2370061661","https://openalex.org/W2097069023","https://openalex.org/W2002107209","https://openalex.org/W2097888999","https://openalex.org/W2394278372"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"the":[3,11,24,29,45,61,90,96,104,119,122,126,137,142,146,150,161,166],"random":[4],"jitter":[5,8,26,46,108,124,128,157],"and":[6,81,159],"deterministic":[7,127],"analysis":[9,27,40,109],"on":[10,60],"proposed":[12,97,105,151],"polyphase":[13],"filter":[14],"(PPF)-based":[15],"multiphase":[16,30,63],"clock":[17,31,64],"in":[18,93],"frequency":[19],"multiplier":[20],"with":[21,95],"reference":[22],"to":[23],"benchmark":[25],"of":[28,48,55,88,133,141,149],"counterpart":[32],"using":[33,165],"conventional":[34],"delay-locked":[35],"loop":[36],"(DLL)":[37],"approach.":[38],"The":[39,69,100,111],"results":[41,78,84,102,112,140],"have":[42,113],"shown":[43,73,114],"that":[44,54,115],"performance":[47,129],"PPF-based":[49,62,120,152,167],"design":[50,164],"is":[51,130],"better":[52],"than":[53],"DLL-based":[56],"design.":[57],"Jitter":[58],"measurement":[59,139],"chip":[65,144],"has":[66,72],"been":[67],"conducted.":[68],"overall":[70],"comparison":[71,101],"excellent":[74],"agreement":[75],"among":[76],"prediction":[77],"from":[79,85],"theory":[80],"realistic":[82],"simulation":[83],"a":[86],"combination":[87],"all":[89],"transistor-level":[91],"circuits":[92],"conjunction":[94],"behavioral":[98],"model.":[99],"confirm":[103],"time":[106],"domain":[107],"method.":[110],"not":[116],"only":[117],"do":[118],"demonstrate":[121],"improved":[123],"performance,":[125],"also":[131],"independent":[132],"components":[134],"mismatch.":[135],"Finally,":[136],"practical":[138,147],"fabricated":[143],"identifies":[145],"pitfalls":[148],"DLL":[153],"design,":[154],"suggesting":[155],"further":[156],"reduction":[158],"demonstrating":[160],"potential":[162],"low-jitter":[163],"DLL.":[168]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}