{"id":"https://openalex.org/W2079677144","doi":"https://doi.org/10.1109/tvlsi.2011.2124477","title":"The Effect of Random Dopant Fluctuations on Logic Timing at Low Voltage","display_name":"The Effect of Random Dopant Fluctuations on Logic Timing at Low Voltage","publication_year":2011,"publication_date":"2011-03-29","ids":{"openalex":"https://openalex.org/W2079677144","doi":"https://doi.org/10.1109/tvlsi.2011.2124477","mag":"2079677144"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2011.2124477","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2011.2124477","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5020570114","display_name":"Rahul Rithe","orcid":null},"institutions":[{"id":"https://openalex.org/I63966007","display_name":"Massachusetts Institute of Technology","ror":"https://ror.org/042nb2s44","country_code":"US","type":"education","lineage":["https://openalex.org/I63966007"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"R. Rithe","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, MA, USA","[Dept. of Electr. Eng. & Comput. Sci., Massachusetts Inst. of Technol., Cambridge, MA, USA]"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, MA, USA","institution_ids":["https://openalex.org/I63966007"]},{"raw_affiliation_string":"[Dept. of Electr. Eng. & Comput. Sci., Massachusetts Inst. of Technol., Cambridge, MA, USA]","institution_ids":["https://openalex.org/I63966007"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110155437","display_name":"Sharon H. Chou","orcid":null},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Chou","raw_affiliation_strings":["Department of Electrical Engineering, University of Stanford, Stanford, CA, USA","[Dept. of Electr. Eng., Stanford Univ., Stanford, CA, USA]"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Stanford, Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]},{"raw_affiliation_string":"[Dept. of Electr. Eng., Stanford Univ., Stanford, CA, USA]","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081242683","display_name":"Jie Gu","orcid":"https://orcid.org/0000-0002-2043-1479"},"institutions":[{"id":"https://openalex.org/I1292082932","display_name":"MaxLinear (United States)","ror":"https://ror.org/049kdc638","country_code":"US","type":"company","lineage":["https://openalex.org/I1292082932"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jie Gu","raw_affiliation_strings":["Max Linear, Inc., Carlsbad, CA, USA","[MaxLinear, Inc., Carlsbad, CA, USA]"],"affiliations":[{"raw_affiliation_string":"Max Linear, Inc., Carlsbad, CA, USA","institution_ids":["https://openalex.org/I1292082932"]},{"raw_affiliation_string":"[MaxLinear, Inc., Carlsbad, CA, USA]","institution_ids":["https://openalex.org/I1292082932"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014997096","display_name":"A. Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I74760111","display_name":"Texas Instruments (United States)","ror":"https://ror.org/03vsmv677","country_code":"US","type":"company","lineage":["https://openalex.org/I74760111"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"A. Wang","raw_affiliation_strings":["Texas Instruments, Inc., Dallas, TX, USA","[Texas Instruments Inc., Dallas, TX, USA]"],"affiliations":[{"raw_affiliation_string":"Texas Instruments, Inc., Dallas, TX, USA","institution_ids":["https://openalex.org/I74760111"]},{"raw_affiliation_string":"[Texas Instruments Inc., Dallas, TX, USA]","institution_ids":["https://openalex.org/I74760111"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111537423","display_name":"Satyendra Datla","orcid":null},"institutions":[{"id":"https://openalex.org/I74760111","display_name":"Texas Instruments (United States)","ror":"https://ror.org/03vsmv677","country_code":"US","type":"company","lineage":["https://openalex.org/I74760111"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Datla","raw_affiliation_strings":["Texas Instruments, Inc., Dallas, TX, USA","[Texas Instruments Inc., Dallas, TX, USA]"],"affiliations":[{"raw_affiliation_string":"Texas Instruments, Inc., Dallas, TX, USA","institution_ids":["https://openalex.org/I74760111"]},{"raw_affiliation_string":"[Texas Instruments Inc., Dallas, TX, USA]","institution_ids":["https://openalex.org/I74760111"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091539902","display_name":"Gordon Gammie","orcid":null},"institutions":[{"id":"https://openalex.org/I74760111","display_name":"Texas Instruments (United States)","ror":"https://ror.org/03vsmv677","country_code":"US","type":"company","lineage":["https://openalex.org/I74760111"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"G. Gammie","raw_affiliation_strings":["Texas Instruments, Inc., Dallas, TX, USA","[Texas Instruments Inc., Dallas, TX, USA]"],"affiliations":[{"raw_affiliation_string":"Texas Instruments, Inc., Dallas, TX, USA","institution_ids":["https://openalex.org/I74760111"]},{"raw_affiliation_string":"[Texas Instruments Inc., Dallas, TX, USA]","institution_ids":["https://openalex.org/I74760111"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052860898","display_name":"D.D. Buss","orcid":null},"institutions":[{"id":"https://openalex.org/I74760111","display_name":"Texas Instruments (United States)","ror":"https://ror.org/03vsmv677","country_code":"US","type":"company","lineage":["https://openalex.org/I74760111"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D. Buss","raw_affiliation_strings":["Texas Instruments, Inc., Dallas, TX, USA","[Texas Instruments Inc., Dallas, TX, USA]"],"affiliations":[{"raw_affiliation_string":"Texas Instruments, Inc., Dallas, TX, USA","institution_ids":["https://openalex.org/I74760111"]},{"raw_affiliation_string":"[Texas Instruments Inc., Dallas, TX, USA]","institution_ids":["https://openalex.org/I74760111"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5084128470","display_name":"Anantha P. Chandrakasan","orcid":"https://orcid.org/0000-0002-5977-2748"},"institutions":[{"id":"https://openalex.org/I63966007","display_name":"Massachusetts Institute of Technology","ror":"https://ror.org/042nb2s44","country_code":"US","type":"education","lineage":["https://openalex.org/I63966007"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"A. Chandrakasan","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, MA, USA","[Dept. of Electr. Eng. & Comput. Sci., Massachusetts Inst. of Technol., Cambridge, MA, USA]"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, MA, USA","institution_ids":["https://openalex.org/I63966007"]},{"raw_affiliation_string":"[Dept. of Electr. Eng. & Comput. Sci., Massachusetts Inst. of Technol., Cambridge, MA, USA]","institution_ids":["https://openalex.org/I63966007"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5020570114"],"corresponding_institution_ids":["https://openalex.org/I63966007"],"apc_list":null,"apc_paid":null,"fwci":3.2288,"has_fulltext":false,"cited_by_count":26,"citation_normalized_percentile":{"value":0.92247213,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":98},"biblio":{"volume":"20","issue":"5","first_page":"911","last_page":"924"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.6020211577415466},{"id":"https://openalex.org/keywords/gaussian","display_name":"Gaussian","score":0.549079418182373},{"id":"https://openalex.org/keywords/probability-density-function","display_name":"Probability density function","score":0.5211270451545715},{"id":"https://openalex.org/keywords/monte-carlo-method","display_name":"Monte Carlo method","score":0.5189613699913025},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.514157772064209},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.49648624658584595},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.48565733432769775},{"id":"https://openalex.org/keywords/delay-calculation","display_name":"Delay calculation","score":0.4555846154689789},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.4409930109977722},{"id":"https://openalex.org/keywords/nonlinear-system","display_name":"Nonlinear system","score":0.43862786889076233},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.43053287267684937},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.42780542373657227},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.29839015007019043},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.2636203169822693},{"id":"https://openalex.org/keywords/propagation-delay","display_name":"Propagation delay","score":0.25329530239105225},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2137843668460846},{"id":"https://openalex.org/keywords/statistics","display_name":"Statistics","score":0.12001028656959534},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.11445632576942444}],"concepts":[{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.6020211577415466},{"id":"https://openalex.org/C163716315","wikidata":"https://www.wikidata.org/wiki/Q901177","display_name":"Gaussian","level":2,"score":0.549079418182373},{"id":"https://openalex.org/C197055811","wikidata":"https://www.wikidata.org/wiki/Q207522","display_name":"Probability density function","level":2,"score":0.5211270451545715},{"id":"https://openalex.org/C19499675","wikidata":"https://www.wikidata.org/wiki/Q232207","display_name":"Monte Carlo method","level":2,"score":0.5189613699913025},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.514157772064209},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.49648624658584595},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.48565733432769775},{"id":"https://openalex.org/C174086752","wikidata":"https://www.wikidata.org/wiki/Q5253471","display_name":"Delay calculation","level":3,"score":0.4555846154689789},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.4409930109977722},{"id":"https://openalex.org/C158622935","wikidata":"https://www.wikidata.org/wiki/Q660848","display_name":"Nonlinear system","level":2,"score":0.43862786889076233},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.43053287267684937},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.42780542373657227},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.29839015007019043},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.2636203169822693},{"id":"https://openalex.org/C90806461","wikidata":"https://www.wikidata.org/wiki/Q1144416","display_name":"Propagation delay","level":2,"score":0.25329530239105225},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2137843668460846},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.12001028656959534},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.11445632576942444},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2011.2124477","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2011.2124477","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":35,"referenced_works":["https://openalex.org/W11171666","https://openalex.org/W1491082069","https://openalex.org/W1964995055","https://openalex.org/W1967709031","https://openalex.org/W1972573758","https://openalex.org/W1999781385","https://openalex.org/W2014976988","https://openalex.org/W2052824980","https://openalex.org/W2054224534","https://openalex.org/W2091845619","https://openalex.org/W2097460520","https://openalex.org/W2098740348","https://openalex.org/W2109950229","https://openalex.org/W2114336500","https://openalex.org/W2115073796","https://openalex.org/W2122144284","https://openalex.org/W2126210007","https://openalex.org/W2126564504","https://openalex.org/W2126827022","https://openalex.org/W2131833150","https://openalex.org/W2132844001","https://openalex.org/W2140823559","https://openalex.org/W2141222031","https://openalex.org/W2142213725","https://openalex.org/W2142826718","https://openalex.org/W2165740397","https://openalex.org/W2168559772","https://openalex.org/W3146202403","https://openalex.org/W4233127653","https://openalex.org/W4233806716","https://openalex.org/W4236811439","https://openalex.org/W4237955880","https://openalex.org/W4246743157","https://openalex.org/W4251011269","https://openalex.org/W6818034446"],"related_works":["https://openalex.org/W2103645363","https://openalex.org/W2072989701","https://openalex.org/W2100329931","https://openalex.org/W1738647919","https://openalex.org/W3000179092","https://openalex.org/W2050511294","https://openalex.org/W2145535176","https://openalex.org/W3131741930","https://openalex.org/W2003625360","https://openalex.org/W2544718775"],"abstract_inverted_index":{"In":[0,58],"order":[1,59,255],"to":[2,39,60,75,175,190,198,237,251],"achieve":[3],"ultra-low":[4],"power":[5],"(ULP),":[6],"ICs":[7],"are":[8,152,232],"being":[9],"designed":[10],"for":[11,91,133],"V":[12,242],"<sub":[13,243],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[14,244],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">DD</sub>":[15,245],"\u2264":[16],"0.5":[17,247],"V.":[18,248],"At":[19],"these":[20,77],"low":[21,100],"voltages,":[22],"random":[23,113],"dopant":[24],"fluctuations":[25],"(RDFs)":[26],"result":[27],"in":[28,146],"a":[29,80,87,107,122,128,141,203,220],"stochastic":[30,52,92],"component":[31],"of":[32,50,65,94,110,140,162,182,256],"logic":[33,70],"delay":[34,53,105,120],"that":[35,231],"can":[36,54],"be":[37,55],"comparable":[38],"the":[40,45,62,103,111,117,138,147,180,183,254,259],"global":[41],"corner":[42],"delay.":[43],"Moreover,":[44],"probability":[46],"density":[47],"function":[48,109],"(PDF)":[49],"this":[51],"highly":[56],"non-Gaussian.":[57,153],"predict":[61],"statistical":[63],"impact":[64],"RDF-induced":[66],"local":[67,163],"variations":[68],"on":[69,137,202,253],"timing,":[71],"it":[72],"is":[73,106,156,170,173,186,195,262],"necessary":[74],"incorporate":[76],"effects":[78],"into":[79,219],"timing":[81,142,199,229],"closure":[82],"methodology.":[83],"This":[84,249],"paper":[85],"presents":[86,127],"computationally":[88],"efficient":[89,131],"methodology":[90,132],"characterization":[93],"standard":[95],"cell":[96,104,119,150,176],"li-":[97],"braries":[98],"at":[99,241],"voltage,":[101],"where":[102,149],"nonlinear":[108,158],"transistor":[112],"variables":[114],"(RVs),":[115],"and":[116,179,217],"resulting":[118],"has":[121,210],"non-Gaussian":[123],"PDF.":[124],"It":[125,172],"also":[126,196],"computation-":[129],"ally":[130],"computing":[134],"any":[135],"point":[136,160],"PDF":[139],"path":[143,200],"(TP)":[144],"delay,":[145],"case":[148],"delays":[151],"The":[154,166,208,225],"method":[155],"called":[157],"operating":[159],"analysis":[161,201,240],"variation":[164],"(NLOPALV).":[165],"general":[167],"NLOPALV":[168,184,194,226],"theory":[169],"developed.":[171],"applied":[174,197],"library":[177],"characterization,":[178],"accuracy":[181,235],"approach":[185,209,227],"validated":[187],"by":[188],"comparison":[189],"Monte":[191,238],"Carlo":[192,239],"simulation.":[193],"28":[204],"nm":[205],"DSP":[206],"IC.":[207],"been":[211],"implemented":[212],"using":[213],"commercial":[214,221],"CAD":[215],"tools,":[216],"integrated":[218],"IC":[222],"design":[223],"flow.":[224],"gives":[228],"results":[230],"within":[233],"5%":[234],"compared":[236],"=":[246],"compares":[250],"errors":[252],"50%":[257],"when":[258],"Gaussian":[260],"approximation":[261],"used.":[263]},"counts_by_year":[{"year":2023,"cited_by_count":2},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":5}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
