{"id":"https://openalex.org/W2108917009","doi":"https://doi.org/10.1109/tvlsi.2011.2107923","title":"Loop Acceleration Exploration for ASIP Architecture","display_name":"Loop Acceleration Exploration for ASIP Architecture","publication_year":2011,"publication_date":"2011-03-07","ids":{"openalex":"https://openalex.org/W2108917009","doi":"https://doi.org/10.1109/tvlsi.2011.2107923","mag":"2108917009"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2011.2107923","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2011.2107923","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5109992225","display_name":"M. Mbaye","orcid":null},"institutions":[{"id":"https://openalex.org/I29607241","display_name":"\u00c9cole Normale Sup\u00e9rieure - PSL","ror":"https://ror.org/05a0dhs15","country_code":"FR","type":"other","lineage":["https://openalex.org/I2746051580","https://openalex.org/I29607241"]},{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]}],"countries":["CA","FR"],"is_corresponding":false,"raw_author_name":"Mame Maria Mbaye","raw_affiliation_strings":["Department of Electrical Engineering, Ecole Polytechnique de Montreal, Montreal, QUE, Canada","Dept. of Electr. Eng., Ecole Polytech. de Montreal, Montre\u0301al, QC, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Ecole Polytechnique de Montreal, Montreal, QUE, Canada","institution_ids":["https://openalex.org/I45683168"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Ecole Polytech. de Montreal, Montre\u0301al, QC, Canada","institution_ids":["https://openalex.org/I29607241","https://openalex.org/I45683168"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065902799","display_name":"Normand B\u00e9langer","orcid":null},"institutions":[{"id":"https://openalex.org/I29607241","display_name":"\u00c9cole Normale Sup\u00e9rieure - PSL","ror":"https://ror.org/05a0dhs15","country_code":"FR","type":"other","lineage":["https://openalex.org/I2746051580","https://openalex.org/I29607241"]},{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]}],"countries":["CA","FR"],"is_corresponding":false,"raw_author_name":"Normand Belanger","raw_affiliation_strings":["Department of Electrical Engineering, Ecole Polytechnique de Montreal, Montreal, QUE, Canada","Dept. of Electr. Eng., Ecole Polytech. de Montreal, Montre\u0301al, QC, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Ecole Polytechnique de Montreal, Montreal, QUE, Canada","institution_ids":["https://openalex.org/I45683168"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Ecole Polytech. de Montreal, Montre\u0301al, QC, Canada","institution_ids":["https://openalex.org/I29607241","https://openalex.org/I45683168"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038488044","display_name":"Yvon Savaria","orcid":"https://orcid.org/0000-0002-3404-9959"},"institutions":[{"id":"https://openalex.org/I29607241","display_name":"\u00c9cole Normale Sup\u00e9rieure - PSL","ror":"https://ror.org/05a0dhs15","country_code":"FR","type":"other","lineage":["https://openalex.org/I2746051580","https://openalex.org/I29607241"]},{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]}],"countries":["CA","FR"],"is_corresponding":false,"raw_author_name":"Yvon Savaria","raw_affiliation_strings":["Department of Electrical Engineering, Ecole Polytechnique de Montreal, Montreal, QUE, Canada","Dept. of Electr. Eng., Ecole Polytech. de Montreal, Montre\u0301al, QC, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Ecole Polytechnique de Montreal, Montreal, QUE, Canada","institution_ids":["https://openalex.org/I45683168"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Ecole Polytech. de Montreal, Montre\u0301al, QC, Canada","institution_ids":["https://openalex.org/I29607241","https://openalex.org/I45683168"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074743707","display_name":"Samuel Pierre","orcid":"https://orcid.org/0000-0001-8063-8773"},"institutions":[{"id":"https://openalex.org/I29607241","display_name":"\u00c9cole Normale Sup\u00e9rieure - PSL","ror":"https://ror.org/05a0dhs15","country_code":"FR","type":"other","lineage":["https://openalex.org/I2746051580","https://openalex.org/I29607241"]},{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]}],"countries":["CA","FR"],"is_corresponding":false,"raw_author_name":"Samuel Pierre","raw_affiliation_strings":["Department of Electrical Engineering, Ecole Polytechnique de Montreal, Montreal, QUE, Canada","Dept. of Electr. Eng., Ecole Polytech. de Montreal, Montre\u0301al, QC, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Ecole Polytechnique de Montreal, Montreal, QUE, Canada","institution_ids":["https://openalex.org/I45683168"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Ecole Polytech. de Montreal, Montre\u0301al, QC, Canada","institution_ids":["https://openalex.org/I29607241","https://openalex.org/I45683168"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.7588,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.7380571,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"20","issue":"4","first_page":"684","last_page":"696"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7592799663543701},{"id":"https://openalex.org/keywords/acceleration","display_name":"Acceleration","score":0.5442547798156738},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.4870660603046417},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.4762064218521118},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.47351884841918945},{"id":"https://openalex.org/keywords/leverage","display_name":"Leverage (statistics)","score":0.43909144401550293},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.4214820861816406},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2886895537376404},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.2738895118236542},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.11973187327384949}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7592799663543701},{"id":"https://openalex.org/C117896860","wikidata":"https://www.wikidata.org/wiki/Q11376","display_name":"Acceleration","level":2,"score":0.5442547798156738},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.4870660603046417},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.4762064218521118},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.47351884841918945},{"id":"https://openalex.org/C153083717","wikidata":"https://www.wikidata.org/wiki/Q6535263","display_name":"Leverage (statistics)","level":2,"score":0.43909144401550293},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.4214820861816406},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2886895537376404},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.2738895118236542},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.11973187327384949},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C74650414","wikidata":"https://www.wikidata.org/wiki/Q11397","display_name":"Classical mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tvlsi.2011.2107923","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2011.2107923","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},{"id":"pmh:oai:publications.polymtl.ca:14988","is_oa":false,"landing_page_url":"https://publications.polymtl.ca/14988/","pdf_url":null,"source":{"id":"https://openalex.org/S4306401013","display_name":"PolyPublie (\u00c9cole Polytechnique de Montr\u00e9al)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I45683168","host_organization_name":"Polytechnique Montr\u00e9al","host_organization_lineage":["https://openalex.org/I45683168"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Article de revue"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5400000214576721,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":54,"referenced_works":["https://openalex.org/W14568393","https://openalex.org/W1492601037","https://openalex.org/W1530670596","https://openalex.org/W1555915743","https://openalex.org/W1558000309","https://openalex.org/W1706382616","https://openalex.org/W1718611749","https://openalex.org/W1723902394","https://openalex.org/W1972303747","https://openalex.org/W1983412169","https://openalex.org/W1984303163","https://openalex.org/W1994115836","https://openalex.org/W2000095678","https://openalex.org/W2010418442","https://openalex.org/W2011078763","https://openalex.org/W2030934436","https://openalex.org/W2071110673","https://openalex.org/W2097038978","https://openalex.org/W2098891450","https://openalex.org/W2100644471","https://openalex.org/W2102446939","https://openalex.org/W2103618033","https://openalex.org/W2111488604","https://openalex.org/W2113706863","https://openalex.org/W2121156724","https://openalex.org/W2121507132","https://openalex.org/W2126233252","https://openalex.org/W2126308165","https://openalex.org/W2131442634","https://openalex.org/W2134084674","https://openalex.org/W2136300693","https://openalex.org/W2138007781","https://openalex.org/W2140928152","https://openalex.org/W2144140451","https://openalex.org/W2144433126","https://openalex.org/W2144981359","https://openalex.org/W2145623050","https://openalex.org/W2154209875","https://openalex.org/W2156499539","https://openalex.org/W2165529924","https://openalex.org/W2165892109","https://openalex.org/W2296760900","https://openalex.org/W2725179571","https://openalex.org/W4232941035","https://openalex.org/W4239726226","https://openalex.org/W4243824997","https://openalex.org/W4244889501","https://openalex.org/W4247846214","https://openalex.org/W4250968581","https://openalex.org/W4256386389","https://openalex.org/W4285719527","https://openalex.org/W6632032316","https://openalex.org/W6633666638","https://openalex.org/W6682520797"],"related_works":["https://openalex.org/W2146872326","https://openalex.org/W2138209363","https://openalex.org/W3133116121","https://openalex.org/W2625058759","https://openalex.org/W3195471267","https://openalex.org/W2971009090","https://openalex.org/W3032310658","https://openalex.org/W4282568311","https://openalex.org/W3193212547","https://openalex.org/W4295935044"],"abstract_inverted_index":{"Design":[0],"space":[1],"exploration":[2,67],"is":[3,15,90],"a":[4,19,44,48],"delicate":[5],"process":[6,68,89,167],"whose":[7],"success":[8],"lays":[9],"on":[10,18,92],"the":[11,72,79,110,133,141,145,182,187],"designers'":[12],"shoulders.":[13],"It":[14],"often":[16],"based":[17,91],"trial-and-error":[20],"approach.":[21],"Some":[22],"basic":[23],"metrics":[24,95,152],"can":[25,60,82,176],"be":[26,61,83],"used":[27,170],"to":[28,85,105,148,154,171],"guide":[29],"this":[30,33],"process.":[31],"In":[32],"paper,":[34],"we":[35],"explore":[36,172],"accelerating":[37],"loops":[38],"from":[39,132],"C-based":[40],"specifications.":[41],"We":[42,63,128],"built":[43],"framework":[45],"in":[46,99],"which":[47,107],"design":[49,101,111,173],"style,":[50],"such":[51,139],"as":[52,140,178,180],"software-oriented":[53],"or":[54,122,160],"application-specific":[55],"instruction-set":[56],"processor":[57],"(ASIP)-oriented":[58],"design,":[59],"specified.":[62],"also":[64,169],"propose":[65],"an":[66],"that":[69,75,81,96,158,175],"allows":[70],"targeting":[71],"main":[73],"aspects":[74,108,157],"limit":[76,121,159],"acceleration":[77,126,166,184],"and":[78,115,135,144],"actions":[80],"made":[84],"improve":[86,161],"it.":[87],"The":[88,164],"new":[93],"loop-oriented":[94,151],"provide":[97],"insight":[98],"key":[100],"issues.":[102],"They":[103],"help":[104,153],"determine":[106],"of":[109,186,189],"between":[112],"data":[113],"accesses":[114],"arithmetic":[116],"logic":[117],"unit":[118],"(ALU)/control":[119],"operations":[120],"allow":[123],"leveraging":[124],"loop":[125,162,165,183],"opportunities.":[127],"profile":[129],"some":[130],"benchmarks":[131],"signal":[134],"image":[136],"processing":[137],"fields,":[138],"Turbo":[142],"Decoder":[143],"JPEG":[146],"algorithms,":[147],"illustrate":[149],"how":[150],"point":[155],"out":[156],"acceleration.":[163],"was":[168],"architectures":[174],"leverage,":[177],"much":[179],"possible,":[181],"opportunities":[185],"sum":[188],"absolute":[190],"differences":[191],"(SAD)":[192],"algorithm.":[193]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}