{"id":"https://openalex.org/W2104781003","doi":"https://doi.org/10.1109/tvlsi.2010.2059054","title":"Statistical Design Optimization of FinFET SRAM Using Back-Gate Voltage","display_name":"Statistical Design Optimization of FinFET SRAM Using Back-Gate Voltage","publication_year":2010,"publication_date":"2010-08-18","ids":{"openalex":"https://openalex.org/W2104781003","doi":"https://doi.org/10.1109/tvlsi.2010.2059054","mag":"2104781003"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2010.2059054","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2010.2059054","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5076545660","display_name":"Behzad Ebrahimi","orcid":"https://orcid.org/0000-0002-1754-435X"},"institutions":[{"id":"https://openalex.org/I23946033","display_name":"University of Tehran","ror":"https://ror.org/05vf56z40","country_code":"IR","type":"education","lineage":["https://openalex.org/I23946033"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Behzad Ebrahimi","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Tehran, Tehran, Iran","[Dept. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Tehran, Tehran, Iran","institution_ids":["https://openalex.org/I23946033"]},{"raw_affiliation_string":"[Dept. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran]","institution_ids":["https://openalex.org/I23946033"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112573882","display_name":"Masoud Rostami","orcid":"https://orcid.org/0009-0000-2489-7674"},"institutions":[{"id":"https://openalex.org/I23946033","display_name":"University of Tehran","ror":"https://ror.org/05vf56z40","country_code":"IR","type":"education","lineage":["https://openalex.org/I23946033"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Masoud Rostami","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Tehran, Tehran, Iran","[Dept. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Tehran, Tehran, Iran","institution_ids":["https://openalex.org/I23946033"]},{"raw_affiliation_string":"[Dept. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran]","institution_ids":["https://openalex.org/I23946033"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074063358","display_name":"Ali Afzali\u2010Kusha","orcid":"https://orcid.org/0000-0001-8614-2007"},"institutions":[{"id":"https://openalex.org/I23946033","display_name":"University of Tehran","ror":"https://ror.org/05vf56z40","country_code":"IR","type":"education","lineage":["https://openalex.org/I23946033"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Ali Afzali-Kusha","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Tehran, Tehran, Iran","[Dept. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Tehran, Tehran, Iran","institution_ids":["https://openalex.org/I23946033"]},{"raw_affiliation_string":"[Dept. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran]","institution_ids":["https://openalex.org/I23946033"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5044650311","display_name":"Massoud Pedram","orcid":"https://orcid.org/0000-0002-2677-7307"},"institutions":[{"id":"https://openalex.org/I23946033","display_name":"University of Tehran","ror":"https://ror.org/05vf56z40","country_code":"IR","type":"education","lineage":["https://openalex.org/I23946033"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Massoud Pedram","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Tehran, Tehran, Iran","[Dept. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Tehran, Tehran, Iran","institution_ids":["https://openalex.org/I23946033"]},{"raw_affiliation_string":"[Dept. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran]","institution_ids":["https://openalex.org/I23946033"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I23946033"],"apc_list":null,"apc_paid":null,"fwci":1.7385,"has_fulltext":false,"cited_by_count":29,"citation_normalized_percentile":{"value":0.86114948,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"19","issue":"10","first_page":"1911","last_page":"1916"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.9226560592651367},{"id":"https://openalex.org/keywords/particle-swarm-optimization","display_name":"Particle swarm optimization","score":0.7960525751113892},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.6492772102355957},{"id":"https://openalex.org/keywords/yield","display_name":"Yield (engineering)","score":0.5275763273239136},{"id":"https://openalex.org/keywords/threshold-voltage","display_name":"Threshold voltage","score":0.5017349720001221},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.49825215339660645},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4898509681224823},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4418860971927643},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3188396692276001},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.29684334993362427},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.26205283403396606},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.24649173021316528},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.19399026036262512}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.9226560592651367},{"id":"https://openalex.org/C85617194","wikidata":"https://www.wikidata.org/wiki/Q2072794","display_name":"Particle swarm optimization","level":2,"score":0.7960525751113892},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.6492772102355957},{"id":"https://openalex.org/C134121241","wikidata":"https://www.wikidata.org/wiki/Q899301","display_name":"Yield (engineering)","level":2,"score":0.5275763273239136},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.5017349720001221},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.49825215339660645},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4898509681224823},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4418860971927643},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3188396692276001},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.29684334993362427},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.26205283403396606},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.24649173021316528},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.19399026036262512},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C191897082","wikidata":"https://www.wikidata.org/wiki/Q11467","display_name":"Metallurgy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2010.2059054","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2010.2059054","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.6299999952316284,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W2095596186","https://openalex.org/W2098286658","https://openalex.org/W2108923470","https://openalex.org/W2111050400","https://openalex.org/W2112475735","https://openalex.org/W2113677113","https://openalex.org/W2115061871","https://openalex.org/W2123085386","https://openalex.org/W2123216823","https://openalex.org/W2132621842","https://openalex.org/W2139340565","https://openalex.org/W2139582493","https://openalex.org/W2145113795","https://openalex.org/W2153920555","https://openalex.org/W2155583994","https://openalex.org/W2158655416","https://openalex.org/W2169675423","https://openalex.org/W2170542648","https://openalex.org/W6676374691","https://openalex.org/W6677313321","https://openalex.org/W6680495084"],"related_works":["https://openalex.org/W3151633427","https://openalex.org/W2212894501","https://openalex.org/W2793465010","https://openalex.org/W3024050170","https://openalex.org/W4293253840","https://openalex.org/W4378977321","https://openalex.org/W1976168335","https://openalex.org/W4308090481","https://openalex.org/W3211992815","https://openalex.org/W179354024"],"abstract_inverted_index":{"In":[0,37],"this":[1,38,83],"paper,":[2],"an":[3],"optimal":[4],"approach":[5,17],"for":[6],"the":[7,19,46,50,57,62,65],"design":[8],"of":[9,22,52,64],"6-T":[10],"FinFET-based":[11],"SRAM":[12,66],"cells":[13],"is":[14,43,89],"proposed.":[15],"The":[16],"considers":[18],"statistical":[20,31],"distributions":[21],"gate":[23],"length":[24],"and":[25,28,71],"silicon":[26],"thickness":[27],"their":[29],"corresponding":[30],"correlations":[32],"due":[33],"to":[34],"process":[35],"variations.":[36],"method,":[39,84],"a":[40,85],"back-gate":[41,58],"voltage":[42],"used":[44],"as":[45],"optimization":[47,55],"knob.":[48],"With":[49],"help":[51],"particle":[53],"swarm":[54],"(PSO),":[56],"voltages":[59],"that":[60],"maximize":[61],"yield":[63,88],"array":[67],"against":[68],"read,":[69],"write,":[70],"access":[72],"time":[73],"failures":[74],"are":[75],"found.":[76],"It":[77],"will":[78],"be":[79],"shown":[80],"that,":[81],"with":[82],"very":[86],"high":[87],"achieved.":[90]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":5},{"year":2014,"cited_by_count":5},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}