{"id":"https://openalex.org/W2048618031","doi":"https://doi.org/10.1109/tvlsi.2009.2028346","title":"Efficient Pattern Matching Algorithm for Memory Architecture","display_name":"Efficient Pattern Matching Algorithm for Memory Architecture","publication_year":2009,"publication_date":"2009-09-30","ids":{"openalex":"https://openalex.org/W2048618031","doi":"https://doi.org/10.1109/tvlsi.2009.2028346","mag":"2048618031"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2009.2028346","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2009.2028346","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5011289357","display_name":"Cheng-Hung Lin","orcid":"https://orcid.org/0000-0003-0044-3840"},"institutions":[{"id":"https://openalex.org/I134161618","display_name":"National Taiwan Normal University","ror":"https://ror.org/059dkdx38","country_code":"TW","type":"education","lineage":["https://openalex.org/I134161618"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Cheng-Hung Lin","raw_affiliation_strings":["Department of Industrial Technology Education, National Taiwan Normal University, Taipei, Taiwan","Dept. of Ind. Technol. Educ., Nat. Taiwan Normal Univ., Taipei, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Industrial Technology Education, National Taiwan Normal University, Taipei, Taiwan","institution_ids":["https://openalex.org/I134161618"]},{"raw_affiliation_string":"Dept. of Ind. Technol. Educ., Nat. Taiwan Normal Univ., Taipei, Taiwan","institution_ids":["https://openalex.org/I134161618"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109098787","display_name":"Shih-Chieh Chang","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Shih-Chieh Chang","raw_affiliation_strings":["Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan","Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]},{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan#TAB#","institution_ids":["https://openalex.org/I25846049"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.3179,"has_fulltext":false,"cited_by_count":34,"citation_normalized_percentile":{"value":0.81000676,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":98},"biblio":{"volume":"19","issue":"1","first_page":"33","last_page":"41"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10400","display_name":"Network Security and Intrusion Detection","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11478","display_name":"Caching and Content Delivery","score":0.9866999983787537,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8421571850776672},{"id":"https://openalex.org/keywords/reconfigurability","display_name":"Reconfigurability","score":0.7284863591194153},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.6015108227729797},{"id":"https://openalex.org/keywords/intrusion-detection-system","display_name":"Intrusion detection system","score":0.5833389759063721},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.5171958208084106},{"id":"https://openalex.org/keywords/pattern-matching","display_name":"Pattern matching","score":0.5139324069023132},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.5117992758750916},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.49712565541267395},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.4886212944984436},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4467610716819763},{"id":"https://openalex.org/keywords/string-searching-algorithm","display_name":"String searching algorithm","score":0.43978026509284973},{"id":"https://openalex.org/keywords/matching","display_name":"Matching (statistics)","score":0.426750123500824},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3832636773586273},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3711671233177185},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.31523242592811584},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.14586684107780457},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.12054526805877686}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8421571850776672},{"id":"https://openalex.org/C2780149590","wikidata":"https://www.wikidata.org/wiki/Q7302742","display_name":"Reconfigurability","level":2,"score":0.7284863591194153},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6015108227729797},{"id":"https://openalex.org/C35525427","wikidata":"https://www.wikidata.org/wiki/Q745881","display_name":"Intrusion detection system","level":2,"score":0.5833389759063721},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.5171958208084106},{"id":"https://openalex.org/C68859911","wikidata":"https://www.wikidata.org/wiki/Q1503724","display_name":"Pattern matching","level":2,"score":0.5139324069023132},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.5117992758750916},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.49712565541267395},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.4886212944984436},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4467610716819763},{"id":"https://openalex.org/C7757238","wikidata":"https://www.wikidata.org/wiki/Q374040","display_name":"String searching algorithm","level":3,"score":0.43978026509284973},{"id":"https://openalex.org/C165064840","wikidata":"https://www.wikidata.org/wiki/Q1321061","display_name":"Matching (statistics)","level":2,"score":0.426750123500824},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3832636773586273},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3711671233177185},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.31523242592811584},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.14586684107780457},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.12054526805877686},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2009.2028346","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2009.2028346","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":38,"referenced_works":["https://openalex.org/W1531610435","https://openalex.org/W1589490050","https://openalex.org/W1674877186","https://openalex.org/W1707172707","https://openalex.org/W1710586424","https://openalex.org/W1834037038","https://openalex.org/W1891233321","https://openalex.org/W1960511147","https://openalex.org/W1976716770","https://openalex.org/W1990061958","https://openalex.org/W2019229329","https://openalex.org/W2030102079","https://openalex.org/W2040176884","https://openalex.org/W2063109203","https://openalex.org/W2073709434","https://openalex.org/W2096474000","https://openalex.org/W2099290142","https://openalex.org/W2099725085","https://openalex.org/W2099964107","https://openalex.org/W2106062486","https://openalex.org/W2115775347","https://openalex.org/W2133560322","https://openalex.org/W2134684274","https://openalex.org/W2146052712","https://openalex.org/W2147228424","https://openalex.org/W2149375166","https://openalex.org/W2149695592","https://openalex.org/W2153102141","https://openalex.org/W2159599528","https://openalex.org/W2171421880","https://openalex.org/W2172264011","https://openalex.org/W3144157896","https://openalex.org/W4243548807","https://openalex.org/W4247093768","https://openalex.org/W6635248401","https://openalex.org/W6637096788","https://openalex.org/W6637452973","https://openalex.org/W6676122042"],"related_works":["https://openalex.org/W2366381853","https://openalex.org/W2381962247","https://openalex.org/W2358601225","https://openalex.org/W2078899734","https://openalex.org/W2357108046","https://openalex.org/W2030963364","https://openalex.org/W2386784266","https://openalex.org/W2377561288","https://openalex.org/W2369921314","https://openalex.org/W3158023397"],"abstract_inverted_index":{"Network":[0],"intrusion":[1,82],"detection":[2,83],"system":[3,84],"is":[4,146],"used":[5],"to":[6,40,64,141],"inspect":[7],"packet":[8],"contents":[9],"against":[10],"thousands":[11],"of":[12,32,53,56,69,77,119,134],"predefined":[13],"malicious":[14],"or":[15],"suspicious":[16],"patterns.":[17],"Because":[18],"traditional":[19,125],"software":[20],"alone":[21],"pattern":[22,42],"matching":[23],"approaches":[24,37],"can":[25,104,131],"no":[26],"longer":[27],"meet":[28,73],"the":[29,66,74,107,114,124,142,147],"high":[30],"throughput":[31,75],"today's":[33],"networking,":[34],"many":[35],"hardware":[36,45,92],"are":[38],"proposed":[39],"accelerate":[41],"matching.":[43],"Among":[44],"approaches,":[46],"memory-based":[47,149],"architecture":[48],"has":[49],"attracted":[50],"a":[51,79,87,99],"lot":[52],"attention":[54],"because":[55],"its":[57],"easy":[58],"reconfigurability":[59],"and":[60,72,91],"scalability.":[61],"In":[62,94,128],"order":[63],"accommodate":[65],"increasing":[67],"number":[68],"attack":[70],"patterns":[71],"requirement":[76],"networks,":[78],"successful":[80],"network":[81],"must":[85],"have":[86],"memory-efficient":[88,100],"pattern-matching":[89,101],"algorithm":[90,102,116,144],"design.":[93],"this":[95],"paper,":[96],"we":[97,130],"propose":[98],"which":[103,145],"significantly":[105],"reduce":[106],"memory":[108,120,135],"requirement.":[109],"For":[110],"Snort":[111],"rule":[112],"sets,":[113],"new":[115],"achieves":[117],"21%":[118],"reduction":[121,136],"compared":[122],"with":[123],"Aho-Corasick":[126],"algorithm.":[127],"addition,":[129],"gain":[132],"24%":[133],"by":[137],"integrating":[138],"our":[139],"approach":[140],"bit-split":[143],"state-of-the-art":[148],"approach.":[150]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":2},{"year":2017,"cited_by_count":5},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":4},{"year":2012,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
