{"id":"https://openalex.org/W2160485669","doi":"https://doi.org/10.1109/tvlsi.2008.2011197","title":"Quasi-Resonant Interconnects: A Low Power, Low Latency Design Methodology","display_name":"Quasi-Resonant Interconnects: A Low Power, Low Latency Design Methodology","publication_year":2009,"publication_date":"2009-01-16","ids":{"openalex":"https://openalex.org/W2160485669","doi":"https://doi.org/10.1109/tvlsi.2008.2011197","mag":"2160485669"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2008.2011197","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2008.2011197","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5082608301","display_name":"Jonathan Rosenfeld","orcid":null},"institutions":[{"id":"https://openalex.org/I5388228","display_name":"University of Rochester","ror":"https://ror.org/022kthw22","country_code":"US","type":"education","lineage":["https://openalex.org/I5388228"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Jonathan Rosenfeld","raw_affiliation_strings":["University of Rochester, Rochester, NY, USA"],"affiliations":[{"raw_affiliation_string":"University of Rochester, Rochester, NY, USA","institution_ids":["https://openalex.org/I5388228"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5053517349","display_name":"Eby G. Friedman","orcid":"https://orcid.org/0000-0002-5549-7160"},"institutions":[{"id":"https://openalex.org/I5388228","display_name":"University of Rochester","ror":"https://ror.org/022kthw22","country_code":"US","type":"education","lineage":["https://openalex.org/I5388228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Eby G. Friedman","raw_affiliation_strings":["University of Rochester, Rochester, NY, USA"],"affiliations":[{"raw_affiliation_string":"University of Rochester, Rochester, NY, USA","institution_ids":["https://openalex.org/I5388228"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5082608301"],"corresponding_institution_ids":["https://openalex.org/I5388228"],"apc_list":null,"apc_paid":null,"fwci":1.2183,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.82087211,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"17","issue":"2","first_page":"181","last_page":"193"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/repeater","display_name":"Repeater (horology)","score":0.7624388933181763},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.721589207649231},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.6870177984237671},{"id":"https://openalex.org/keywords/inductor","display_name":"Inductor","score":0.6865962147712708},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5945931077003479},{"id":"https://openalex.org/keywords/power\u2013delay-product","display_name":"Power\u2013delay product","score":0.564616858959198},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.4624844193458557},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.44614899158477783},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.43537747859954834},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.43299245834350586},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3936659097671509},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3848922848701477},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.3808142840862274},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.36586901545524597},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.18479293584823608},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.16088947653770447},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.12675803899765015},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.09011274576187134}],"concepts":[{"id":"https://openalex.org/C195545963","wikidata":"https://www.wikidata.org/wiki/Q1469803","display_name":"Repeater (horology)","level":3,"score":0.7624388933181763},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.721589207649231},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.6870177984237671},{"id":"https://openalex.org/C144534570","wikidata":"https://www.wikidata.org/wiki/Q5325","display_name":"Inductor","level":3,"score":0.6865962147712708},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5945931077003479},{"id":"https://openalex.org/C2776391166","wikidata":"https://www.wikidata.org/wiki/Q7236873","display_name":"Power\u2013delay product","level":4,"score":0.564616858959198},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.4624844193458557},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.44614899158477783},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.43537747859954834},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.43299245834350586},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3936659097671509},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3848922848701477},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3808142840862274},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.36586901545524597},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.18479293584823608},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.16088947653770447},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.12675803899765015},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.09011274576187134},{"id":"https://openalex.org/C131584629","wikidata":"https://www.wikidata.org/wiki/Q4308705","display_name":"Coupling (piping)","level":2,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tvlsi.2008.2011197","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2008.2011197","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.160.5643","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.160.5643","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ece.rochester.edu/users/friedman/papers/TVLSI_09_Quasi.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8700000047683716,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1554301658","https://openalex.org/W1896212546","https://openalex.org/W2035551293","https://openalex.org/W2039358455","https://openalex.org/W2042882340","https://openalex.org/W2066332052","https://openalex.org/W2066910438","https://openalex.org/W2075664962","https://openalex.org/W2089136617","https://openalex.org/W2128060653","https://openalex.org/W2128433628","https://openalex.org/W2131450843","https://openalex.org/W2135411637","https://openalex.org/W2135873340","https://openalex.org/W2139100564","https://openalex.org/W2142946099","https://openalex.org/W2169287990","https://openalex.org/W2406845956","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W14477523","https://openalex.org/W2096915862","https://openalex.org/W2071492559","https://openalex.org/W2141708460","https://openalex.org/W1999169921","https://openalex.org/W2037897954","https://openalex.org/W2033631699","https://openalex.org/W2442246590","https://openalex.org/W2109072162","https://openalex.org/W2538802758"],"abstract_inverted_index":{"Design":[0],"and":[1,28,35,46,51,58,105,112,124,131],"analysis":[2,50],"guidelines":[3],"for":[4,61],"quasi-resonant":[5,75],"interconnect":[6,27],"networks":[7],"(QRN)":[8],"are":[9],"presented":[10],"in":[11,88,109,128],"this":[12],"paper.":[13],"The":[14,49],"methodology":[15],"focuses":[16],"on":[17],"developing":[18],"an":[19,100],"accurate":[20],"analytic":[21],"distributed":[22],"model":[23,45],"of":[24,53,73,103,122],"the":[25,43,54,71],"on-chip":[26],"inductor":[29],"to":[30,96,117],"obtain":[31],"both":[32],"low":[33,36],"power":[34,110,129],"latency.":[37],"Excellent":[38],"agreement":[39],"is":[40,65,107,126],"shown":[41],"between":[42],"proposed":[44],"SpectraS":[47],"simulations.":[48],"design":[52,72],"inductor,":[55],"insertion":[56],"point,":[57],"driver":[59],"resistance":[60],"minimum":[62],"power-delay":[63],"product":[64],"described.":[66],"A":[67],"case":[68],"study":[69],"demonstrates":[70],"a":[74,78,84,89,120],"interconnect,":[76],"transmitting":[77],"5":[79,85],"Gb/s":[80],"data":[81],"signal":[82],"along":[83],"mm":[86],"line":[87],"TSMC":[90],"0.18-mum":[91],"CMOS":[92],"technology.":[93],"As":[94,115],"compared":[95,116],"classical":[97],"repeater":[98],"insertion,":[99],"average":[101],"reduction":[102,121],"91.1%":[104],"37.8%":[106],"obtained":[108],"consumption":[111,130],"delay,":[113,132],"respectively.":[114,133],"optical":[118],"links,":[119],"97.1%":[123],"35.6%":[125],"observed":[127]},"counts_by_year":[],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}