{"id":"https://openalex.org/W2149706304","doi":"https://doi.org/10.1109/tvlsi.2008.2011048","title":"DFT and Minimum Leakage Pattern Generation for Static Power Reduction During Test and Burn-In","display_name":"DFT and Minimum Leakage Pattern Generation for Static Power Reduction During Test and Burn-In","publication_year":2009,"publication_date":"2009-04-15","ids":{"openalex":"https://openalex.org/W2149706304","doi":"https://doi.org/10.1109/tvlsi.2008.2011048","mag":"2149706304"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2008.2011048","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2008.2011048","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5045211397","display_name":"Wei-Chung Kao","orcid":"https://orcid.org/0000-0002-6601-8786"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Wei-Chung Kao","raw_affiliation_strings":["Electrical Engineering Department, National Taiwan University, Taipei, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical Engineering Department, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071345561","display_name":"Wei-Shun Chuang","orcid":null},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Wei-Shun Chuang","raw_affiliation_strings":["Electrical Engineering Department, National Taiwan University, Taipei, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical Engineering Department, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043580751","display_name":"Hsiu-Ting Lin","orcid":"https://orcid.org/0000-0002-9565-1898"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Hsiu-Ting Lin","raw_affiliation_strings":["Electrical Engineering Department, National Taiwan University, Taipei, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical Engineering Department, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017361488","display_name":"James Chien-Mo Li","orcid":"https://orcid.org/0000-0002-4393-5186"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"James Chien-Mo Li","raw_affiliation_strings":["Electrical Engineering Department, National Taiwan University, Taipei, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical Engineering Department, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5033377932","display_name":"Vasco Manquinho","orcid":"https://orcid.org/0000-0002-4205-2189"},"institutions":[{"id":"https://openalex.org/I121345201","display_name":"Instituto de Engenharia de Sistemas e Computadores Investiga\u00e7\u00e3o e Desenvolvimento","ror":"https://ror.org/04mqy3p58","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I121345201","https://openalex.org/I4210125590"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"Vasco Manquinho","raw_affiliation_strings":["Instituto Superior T\u00e9cnico IST INESC-ID, Technical University of Lisbon, Lisboa, Portugal"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto Superior T\u00e9cnico IST INESC-ID, Technical University of Lisbon, Lisboa, Portugal","institution_ids":["https://openalex.org/I121345201"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2681,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.60995458,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"18","issue":"3","first_page":"392","last_page":"400"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.5735671520233154},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.5647343397140503},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4845668375492096},{"id":"https://openalex.org/keywords/burn-in","display_name":"Burn-in","score":0.4781554639339447},{"id":"https://openalex.org/keywords/minification","display_name":"Minification","score":0.4774899184703827},{"id":"https://openalex.org/keywords/partition","display_name":"Partition (number theory)","score":0.4632296562194824},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.4571833610534668},{"id":"https://openalex.org/keywords/solver","display_name":"Solver","score":0.4570886790752411},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.4564312994480133},{"id":"https://openalex.org/keywords/leakage-power","display_name":"Leakage power","score":0.45366647839546204},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.45207902789115906},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.42845430970191956},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.42440152168273926},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.42275458574295044},{"id":"https://openalex.org/keywords/partition-problem","display_name":"Partition problem","score":0.42201119661331177},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3977638781070709},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.38922208547592163},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3358573913574219},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.3007652461528778},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.2906067967414856},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.23848193883895874},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.15032213926315308},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.10483705997467041}],"concepts":[{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.5735671520233154},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.5647343397140503},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4845668375492096},{"id":"https://openalex.org/C179707776","wikidata":"https://www.wikidata.org/wiki/Q662895","display_name":"Burn-in","level":2,"score":0.4781554639339447},{"id":"https://openalex.org/C147764199","wikidata":"https://www.wikidata.org/wiki/Q6865248","display_name":"Minification","level":2,"score":0.4774899184703827},{"id":"https://openalex.org/C42812","wikidata":"https://www.wikidata.org/wiki/Q1082910","display_name":"Partition (number theory)","level":2,"score":0.4632296562194824},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.4571833610534668},{"id":"https://openalex.org/C2778770139","wikidata":"https://www.wikidata.org/wiki/Q1966904","display_name":"Solver","level":2,"score":0.4570886790752411},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.4564312994480133},{"id":"https://openalex.org/C2987719587","wikidata":"https://www.wikidata.org/wiki/Q1811428","display_name":"Leakage power","level":4,"score":0.45366647839546204},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.45207902789115906},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.42845430970191956},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.42440152168273926},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.42275458574295044},{"id":"https://openalex.org/C35995877","wikidata":"https://www.wikidata.org/wiki/Q1065968","display_name":"Partition problem","level":3,"score":0.42201119661331177},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3977638781070709},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.38922208547592163},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3358573913574219},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.3007652461528778},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.2906067967414856},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.23848193883895874},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.15032213926315308},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.10483705997467041},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2008.2011048","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2008.2011048","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.7799999713897705}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":50,"referenced_works":["https://openalex.org/W156271197","https://openalex.org/W1486302018","https://openalex.org/W1661368752","https://openalex.org/W1860460518","https://openalex.org/W1900996732","https://openalex.org/W1913711070","https://openalex.org/W1991727477","https://openalex.org/W2038549215","https://openalex.org/W2080510479","https://openalex.org/W2083626899","https://openalex.org/W2095117703","https://openalex.org/W2095816730","https://openalex.org/W2102168889","https://openalex.org/W2103184499","https://openalex.org/W2106290576","https://openalex.org/W2106303764","https://openalex.org/W2108049334","https://openalex.org/W2108143446","https://openalex.org/W2110123494","https://openalex.org/W2110782495","https://openalex.org/W2113576355","https://openalex.org/W2113996606","https://openalex.org/W2115208793","https://openalex.org/W2116758077","https://openalex.org/W2119691242","https://openalex.org/W2121194013","https://openalex.org/W2121665867","https://openalex.org/W2126641963","https://openalex.org/W2134226740","https://openalex.org/W2134292769","https://openalex.org/W2138654786","https://openalex.org/W2148244401","https://openalex.org/W2149999206","https://openalex.org/W2155309348","https://openalex.org/W2160444875","https://openalex.org/W2165788555","https://openalex.org/W2473594952","https://openalex.org/W3000171651","https://openalex.org/W3014325818","https://openalex.org/W4205355374","https://openalex.org/W4230455058","https://openalex.org/W4232844436","https://openalex.org/W4236269389","https://openalex.org/W4248612738","https://openalex.org/W4253620068","https://openalex.org/W4301871366","https://openalex.org/W6639126395","https://openalex.org/W6639759450","https://openalex.org/W6674392192","https://openalex.org/W6959776666"],"related_works":["https://openalex.org/W4251918988","https://openalex.org/W1986287575","https://openalex.org/W2353008372","https://openalex.org/W2171912619","https://openalex.org/W4254560580","https://openalex.org/W2150551164","https://openalex.org/W1965082216","https://openalex.org/W2001867638","https://openalex.org/W1908393759","https://openalex.org/W2107495488"],"abstract_inverted_index":{"This":[0,24,129],"paper":[1],"presents":[2],"a":[3,34],"design":[4],"for":[5,21,68,94],"testability":[6],"and":[7,19,72],"minimum":[8,28],"leakage":[9,29,43],"pattern":[10,30],"generation":[11,31],"technique":[12,25,130],"to":[13,106,123],"reduce":[14],"static":[15,98,133],"power":[16,44,99,134],"during":[17],"test":[18],"burn-in":[20],"nanometer":[22],"technologies.":[23],"transforms":[26],"the":[27,80,97,112,132,137],"problem":[32,53],"into":[33],"pseudo-Boolean":[35],"optimization":[36],"(PBO)":[37],"problem.":[38],"Nonlinear":[39],"objective":[40],"functions":[41],"of":[42],"are":[45],"approximated":[46],"by":[47,58],"linear":[48],"ones":[49],"such":[50],"that":[51],"this":[52],"can":[54],"be":[55],"solved":[56],"efficiently":[57],"an":[59],"existing":[60],"PBO":[61],"solver.":[62],"A":[63],"partitioning-based":[64],"algorithm":[65],"is":[66,100,116],"applied":[67],"control":[69],"point":[70],"insertion":[71],"also":[73],"CPU":[74,114],"time":[75,115],"reduction.":[76],"Experimental":[77],"results":[78],"on":[79],"IEEE":[81],"ISCAS'89":[82],"benchmark":[83],"circuits":[84],"using":[85],"Taiwan":[86],"Semiconductor":[87],"Manufacturing":[88],"Company":[89],"90-nm":[90],"technology":[91],"show":[92],"that,":[93],"large":[95],"circuits,":[96],"reduced":[101,117],"from":[102,118],"8.3%":[103],"(without":[104,121],"partition)":[105,122],"17.47%":[107],"(with":[108,126],"64":[109,127],"partitions).":[110,128],"Besides,":[111],"overall":[113],"3600":[119],"s":[120,125],"83":[124],"reduces":[131],"without":[135],"changing":[136],"manufacturing":[138],"process":[139],"or":[140],"library":[141],"cells.":[142]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2015,"cited_by_count":3}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}