{"id":"https://openalex.org/W2131189523","doi":"https://doi.org/10.1109/tvlsi.2008.2003482","title":"Analysis and Implementation of a Minimum-Supply Body-Biased CMOS Differential Amplifier Cell","display_name":"Analysis and Implementation of a Minimum-Supply Body-Biased CMOS Differential Amplifier Cell","publication_year":2008,"publication_date":"2008-12-10","ids":{"openalex":"https://openalex.org/W2131189523","doi":"https://doi.org/10.1109/tvlsi.2008.2003482","mag":"2131189523"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2008.2003482","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2008.2003482","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5078615947","display_name":"Alfio Dario Grasso","orcid":"https://orcid.org/0000-0002-5707-9683"},"institutions":[{"id":"https://openalex.org/I39063666","display_name":"University of Catania","ror":"https://ror.org/03a64bh57","country_code":"IT","type":"education","lineage":["https://openalex.org/I39063666"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"A.D. Grasso","raw_affiliation_strings":["Dipartimento di Ingegneria Elettrica Elettronica e dei Sistemi (DIEES), Universita Catania, Catania, Italy","Dipt. di Ing. Elettr. Elettron. e dei Sist. (DIEES), Univ. of Catania, Catania"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Ingegneria Elettrica Elettronica e dei Sistemi (DIEES), Universita Catania, Catania, Italy","institution_ids":["https://openalex.org/I39063666"]},{"raw_affiliation_string":"Dipt. di Ing. Elettr. Elettron. e dei Sist. (DIEES), Univ. of Catania, Catania","institution_ids":["https://openalex.org/I39063666"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070430111","display_name":"Pietro Monsurr\u00f2","orcid":"https://orcid.org/0000-0002-3821-6566"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"P. Monsurro","raw_affiliation_strings":["Dipartimento di Ingegneria Elettronica (DIE), University of Roma La Sapienza, Rome, Italy","Dipt. di Ing. Elettron. (DIE), Univ. of Rome La Sapienza, Rome"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Ingegneria Elettronica (DIE), University of Roma La Sapienza, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]},{"raw_affiliation_string":"Dipt. di Ing. Elettron. (DIE), Univ. of Rome La Sapienza, Rome","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004729135","display_name":"Salvatore Pennisi","orcid":"https://orcid.org/0000-0002-5803-484X"},"institutions":[{"id":"https://openalex.org/I39063666","display_name":"University of Catania","ror":"https://ror.org/03a64bh57","country_code":"IT","type":"education","lineage":["https://openalex.org/I39063666"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"S. Pennisi","raw_affiliation_strings":["Dipartimento di Ingegneria Elettrica Elettronica e dei Sistemi (DIEES), Universita Catania, Catania, Italy","Dipt. di Ing. Elettr. Elettron. e dei Sist. (DIEES), Univ. of Catania, Catania"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Ingegneria Elettrica Elettronica e dei Sistemi (DIEES), Universita Catania, Catania, Italy","institution_ids":["https://openalex.org/I39063666"]},{"raw_affiliation_string":"Dipt. di Ing. Elettr. Elettron. e dei Sist. (DIEES), Univ. of Catania, Catania","institution_ids":["https://openalex.org/I39063666"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010336494","display_name":"Giuseppe Scotti","orcid":"https://orcid.org/0000-0002-5650-8212"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"G. Scotti","raw_affiliation_strings":["Dipartimento di Ingegneria Elettronica (DIE), University of Roma La Sapienza, Rome, Italy","Dipt. di Ing. Elettron. (DIE), Univ. of Rome La Sapienza, Rome"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Ingegneria Elettronica (DIE), University of Roma La Sapienza, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]},{"raw_affiliation_string":"Dipt. di Ing. Elettron. (DIE), Univ. of Rome La Sapienza, Rome","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068452963","display_name":"Alessandro Trifiletti","orcid":"https://orcid.org/0000-0001-6231-4273"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"A. Trifiletti","raw_affiliation_strings":["Dipartimento di Ingegneria Elettronica (DIE), University of Roma La Sapienza, Rome, Italy","Dipt. di Ing. Elettron. (DIE), Univ. of Rome La Sapienza, Rome"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Ingegneria Elettronica (DIE), University of Roma La Sapienza, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]},{"raw_affiliation_string":"Dipt. di Ing. Elettron. (DIE), Univ. of Rome La Sapienza, Rome","institution_ids":["https://openalex.org/I861853513"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5078615947"],"corresponding_institution_ids":["https://openalex.org/I39063666"],"apc_list":null,"apc_paid":null,"fwci":1.9378,"has_fulltext":false,"cited_by_count":27,"citation_normalized_percentile":{"value":0.85895122,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"17","issue":"2","first_page":"172","last_page":"180"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.7005152106285095},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6932316422462463},{"id":"https://openalex.org/keywords/biasing","display_name":"Biasing","score":0.6079725623130798},{"id":"https://openalex.org/keywords/differential-amplifier","display_name":"Differential amplifier","score":0.6029701232910156},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.5828782916069031},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.500192403793335},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.4908753037452698},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4827503561973572},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.4595441222190857},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.439267635345459},{"id":"https://openalex.org/keywords/differential","display_name":"Differential (mechanical device)","score":0.4269493818283081},{"id":"https://openalex.org/keywords/common-mode-rejection-ratio","display_name":"Common-mode rejection ratio","score":0.42487964034080505},{"id":"https://openalex.org/keywords/current","display_name":"Current (fluid)","score":0.4149794280529022},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4060383439064026},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.3711264133453369},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.2901308536529541},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.27212369441986084},{"id":"https://openalex.org/keywords/control","display_name":"Control (management)","score":0.17315122485160828}],"concepts":[{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.7005152106285095},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6932316422462463},{"id":"https://openalex.org/C20254490","wikidata":"https://www.wikidata.org/wiki/Q719550","display_name":"Biasing","level":3,"score":0.6079725623130798},{"id":"https://openalex.org/C11722477","wikidata":"https://www.wikidata.org/wiki/Q1056298","display_name":"Differential amplifier","level":4,"score":0.6029701232910156},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.5828782916069031},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.500192403793335},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.4908753037452698},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4827503561973572},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.4595441222190857},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.439267635345459},{"id":"https://openalex.org/C93226319","wikidata":"https://www.wikidata.org/wiki/Q193137","display_name":"Differential (mechanical device)","level":2,"score":0.4269493818283081},{"id":"https://openalex.org/C102309569","wikidata":"https://www.wikidata.org/wiki/Q1244941","display_name":"Common-mode rejection ratio","level":5,"score":0.42487964034080505},{"id":"https://openalex.org/C148043351","wikidata":"https://www.wikidata.org/wiki/Q4456944","display_name":"Current (fluid)","level":2,"score":0.4149794280529022},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4060383439064026},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.3711264133453369},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.2901308536529541},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.27212369441986084},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.17315122485160828},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tvlsi.2008.2003482","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2008.2003482","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},{"id":"pmh:oai:iris.uniroma1.it:11573/230234","is_oa":false,"landing_page_url":"http://hdl.handle.net/11573/230234","pdf_url":null,"source":{"id":"https://openalex.org/S4377196107","display_name":"IRIS Research product catalog (Sapienza University of Rome)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7799999713897705,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1489452400","https://openalex.org/W1576972161","https://openalex.org/W1964629396","https://openalex.org/W1968300101","https://openalex.org/W2010207639","https://openalex.org/W2016148407","https://openalex.org/W2021570329","https://openalex.org/W2036779818","https://openalex.org/W2080615209","https://openalex.org/W2086568432","https://openalex.org/W2096668447","https://openalex.org/W2114254364","https://openalex.org/W2117471170","https://openalex.org/W2145851697","https://openalex.org/W2157637127","https://openalex.org/W2160509435","https://openalex.org/W2162080503","https://openalex.org/W2167217451","https://openalex.org/W4256584879"],"related_works":["https://openalex.org/W4240158017","https://openalex.org/W2094356678","https://openalex.org/W1500249877","https://openalex.org/W2165510722","https://openalex.org/W2113246691","https://openalex.org/W1877685702","https://openalex.org/W1589477929","https://openalex.org/W2394349332","https://openalex.org/W1423479034","https://openalex.org/W2965264963"],"abstract_inverted_index":{"A":[0],"CMOS":[1],"differential":[2,57,132],"amplifier":[3],"cell":[4],"for":[5],"minimum":[6],"supply":[7,138],"requirements":[8],"is":[9,73,124],"presented.":[10],"The":[11],"solution":[12],"uses":[13,135],"transistors":[14],"in":[15,55,68,83,103],"strong":[16],"inversion":[17],"and":[18,38,75,95],"an":[19,63,101],"original":[20],"biasing":[21],"scheme":[22],"that":[23,119,127,134],"exploits":[24],"the":[25,29,35,47,50,69,104,113,120],"bulk":[26],"terminals":[27],"of":[28,49,107,128,139],"transistor":[30],"pair":[31,133],"to":[32,112,126],"accurately":[33],"set":[34],"quiescent":[36],"current":[37,52,106],"provide":[39],"common-mode":[40],"control.":[41],"As":[42],"a":[43,80,84,129,136],"result,":[44],"we":[45],"avoid":[46],"use":[48],"tail":[51],"source":[53],"adopted":[54],"traditional":[56,130],"stages.":[58],"An":[59],"implementation":[60],"based":[61],"on":[62,79],"auxiliary":[64],"switched-capacitor":[65],"network":[66],"used":[67],"feedback":[70],"control":[71],"loop":[72],"proposed":[74],"theoretically":[76],"examined.":[77],"Measurements":[78],"prototype":[81],"fabricated":[82],"standard":[85],"0.35-":[86],"mum":[87],"technology":[88],"(with":[89],"threshold":[90],"voltages":[91],"around":[92],"0.5":[93],"V)":[94],"powered":[96],"with":[97,110],"1.2":[98],"V":[99],"show":[100],"error":[102],"bias":[105],"about":[108],"15%":[109],"respect":[111],"expected":[114],"value.":[115],"It":[116],"was":[117],"found":[118],"obtained":[121],"overall":[122],"performance":[123],"comparable":[125],"long-tailed":[131],"higher":[137],"1.5":[140],"V.":[141]},"counts_by_year":[{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}