{"id":"https://openalex.org/W2172171018","doi":"https://doi.org/10.1109/tvlsi.2008.2003003","title":"VLSI Implementation of an Edge-Oriented Image Scaling Processor","display_name":"VLSI Implementation of an Edge-Oriented Image Scaling Processor","publication_year":2009,"publication_date":"2009-03-12","ids":{"openalex":"https://openalex.org/W2172171018","doi":"https://doi.org/10.1109/tvlsi.2008.2003003","mag":"2172171018"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2008.2003003","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2008.2003003","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5079051364","display_name":"Pei\u2010Yin Chen","orcid":"https://orcid.org/0000-0002-5104-6055"},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Pei-Yin Chen","raw_affiliation_strings":["Department of Computer Science and Information Engineering, National Cheng Kung University, Tainan County, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Information Engineering, National Cheng Kung University, Tainan County, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041390807","display_name":"Chih\u2010Yuan Lien","orcid":null},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chih-Yuan Lien","raw_affiliation_strings":["Department of Computer Science and Information Engineering, National Cheng Kung University, Tainan County, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Information Engineering, National Cheng Kung University, Tainan County, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016827513","display_name":"Chi-Pin Lu","orcid":null},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chi-Pin Lu","raw_affiliation_strings":["Department of Computer Science and Information Engineering, National Cheng Kung University, Tainan County, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Information Engineering, National Cheng Kung University, Tainan County, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I91807558"],"apc_list":null,"apc_paid":null,"fwci":1.9709,"has_fulltext":false,"cited_by_count":49,"citation_normalized_percentile":{"value":0.8878534,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"17","issue":"9","first_page":"1275","last_page":"1284"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11105","display_name":"Advanced Image Processing Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11105","display_name":"Advanced Image Processing Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10688","display_name":"Image and Signal Denoising Methods","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10531","display_name":"Advanced Vision and Imaging","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.8862211108207703},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7105478644371033},{"id":"https://openalex.org/keywords/enhanced-data-rates-for-gsm-evolution","display_name":"Enhanced Data Rates for GSM Evolution","score":0.6766526699066162},{"id":"https://openalex.org/keywords/pixel","display_name":"Pixel","score":0.6234903931617737},{"id":"https://openalex.org/keywords/scaling","display_name":"Scaling","score":0.5895024538040161},{"id":"https://openalex.org/keywords/image-processing","display_name":"Image processing","score":0.530593991279602},{"id":"https://openalex.org/keywords/image-scaling","display_name":"Image scaling","score":0.5224375128746033},{"id":"https://openalex.org/keywords/image","display_name":"Image (mathematics)","score":0.48397111892700195},{"id":"https://openalex.org/keywords/image-quality","display_name":"Image quality","score":0.4691680073738098},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.352131724357605},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.24160712957382202},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.19827434420585632},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.11992409825325012}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.8862211108207703},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7105478644371033},{"id":"https://openalex.org/C162307627","wikidata":"https://www.wikidata.org/wiki/Q204833","display_name":"Enhanced Data Rates for GSM Evolution","level":2,"score":0.6766526699066162},{"id":"https://openalex.org/C160633673","wikidata":"https://www.wikidata.org/wiki/Q355198","display_name":"Pixel","level":2,"score":0.6234903931617737},{"id":"https://openalex.org/C99844830","wikidata":"https://www.wikidata.org/wiki/Q102441924","display_name":"Scaling","level":2,"score":0.5895024538040161},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.530593991279602},{"id":"https://openalex.org/C27405340","wikidata":"https://www.wikidata.org/wiki/Q440296","display_name":"Image scaling","level":4,"score":0.5224375128746033},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.48397111892700195},{"id":"https://openalex.org/C55020928","wikidata":"https://www.wikidata.org/wiki/Q3813865","display_name":"Image quality","level":3,"score":0.4691680073738098},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.352131724357605},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.24160712957382202},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.19827434420585632},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.11992409825325012},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2008.2003003","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2008.2003003","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4399999976158142,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1564988109","https://openalex.org/W1711956092","https://openalex.org/W1925257894","https://openalex.org/W2044011870","https://openalex.org/W2088869937","https://openalex.org/W2102332952","https://openalex.org/W2113524221","https://openalex.org/W2127403362","https://openalex.org/W2142010396","https://openalex.org/W2145653895","https://openalex.org/W2149429443","https://openalex.org/W2163423121","https://openalex.org/W2164300629","https://openalex.org/W2170965888","https://openalex.org/W4236844765"],"related_works":["https://openalex.org/W4283025278","https://openalex.org/W2082432309","https://openalex.org/W817174743","https://openalex.org/W2050492524","https://openalex.org/W2998315020","https://openalex.org/W1976665945","https://openalex.org/W3016208414","https://openalex.org/W2104790384","https://openalex.org/W2799797012","https://openalex.org/W2801208768"],"abstract_inverted_index":{"Image":[0],"scaling":[1,25,36,95],"is":[2,38,53],"a":[3,41,103],"very":[4],"important":[5],"technique":[6,37,52],"and":[7,85,101],"has":[8],"been":[9],"widely":[10],"used":[11],"in":[12,45,79],"many":[13],"image":[14,58,67,94],"processing":[15,104],"applications.":[16],"In":[17],"this":[18],"paper,":[19],"we":[20],"present":[21],"an":[22],"edge-oriented":[23],"area-pixel":[24,35],"processor.":[26],"To":[27],"achieve":[28,65],"the":[29,34,57,71],"goal":[30],"of":[31,81,92,106],"low":[32],"cost,":[33],"implemented":[39],"with":[40,70],"low-complexity":[42,73],"VLSI":[43,90],"architecture":[44,91],"our":[46,75,93],"design.":[47],"A":[48],"simple":[49],"edge":[50,59],"catching":[51],"adopted":[54],"to":[55,64],"preserve":[56],"features":[60],"effectively":[61],"so":[62],"as":[63],"better":[66,78],"quality.":[68,87],"Compared":[69],"previous":[72],"techniques,":[74],"method":[76],"performs":[77],"terms":[80],"both":[82],"quantitative":[83],"evaluation":[84],"visual":[86],"The":[88],"seven-stage":[89],"processor":[96],"contains":[97],"10.4-K":[98],"gate":[99],"counts":[100],"yields":[102],"rate":[105],"about":[107],"200":[108],"MHz":[109],"by":[110],"using":[111],"TSMC":[112],"0.18-mum":[113],"technology.":[114]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":6},{"year":2014,"cited_by_count":9},{"year":2013,"cited_by_count":6},{"year":2012,"cited_by_count":2}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}
