{"id":"https://openalex.org/W2157245959","doi":"https://doi.org/10.1109/tvlsi.2008.2001563","title":"Design and Analysis of Isolated Noise-Tolerant (INT) Technique in Dynamic CMOS Circuits","display_name":"Design and Analysis of Isolated Noise-Tolerant (INT) Technique in Dynamic CMOS Circuits","publication_year":2008,"publication_date":"2008-11-25","ids":{"openalex":"https://openalex.org/W2157245959","doi":"https://doi.org/10.1109/tvlsi.2008.2001563","mag":"2157245959"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2008.2001563","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2008.2001563","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5005575420","display_name":"I\u2010Chyn Wey","orcid":"https://orcid.org/0000-0003-3412-6958"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"I-Chyn Wey","raw_affiliation_strings":["Department of Electrical Engineering, Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5042788229","display_name":"You-Gang Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"You-Gang Chen","raw_affiliation_strings":["Department of Electrical Engineering, Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109465340","display_name":"An-Yeu Wu","orcid":"https://orcid.org/0000-0003-4731-8633"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"An-Yeu Wu","raw_affiliation_strings":["Department of Electrical Engineering, Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I16733864"],"apc_list":null,"apc_paid":null,"fwci":0.3018,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.69407378,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"16","issue":"12","first_page":"1708","last_page":"1712"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.670299768447876},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6681855916976929},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.60759037733078},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5665417909622192},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.546053409576416},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.49976229667663574},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.4871070384979248},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4413783550262451},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.37304794788360596},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24999776482582092},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.11458909511566162}],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.670299768447876},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6681855916976929},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.60759037733078},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5665417909622192},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.546053409576416},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.49976229667663574},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.4871070384979248},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4413783550262451},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.37304794788360596},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24999776482582092},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.11458909511566162},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tvlsi.2008.2001563","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2008.2001563","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},{"id":"pmh:oai:140.112.114.62:246246/150028","is_oa":false,"landing_page_url":"http://ntur.lib.ntu.edu.tw//handle/246246/150028","pdf_url":null,"source":{"id":"https://openalex.org/S4306402491","display_name":"NTUR (\u81fa\u7063\u6a5f\u69cb\u5178\u85cf)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I16733864","host_organization_name":"National Taiwan University","host_organization_lineage":["https://openalex.org/I16733864"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8799999952316284,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1497664440","https://openalex.org/W1823434954","https://openalex.org/W1992809240","https://openalex.org/W2109785400","https://openalex.org/W2115913680","https://openalex.org/W2120331545","https://openalex.org/W2133467019","https://openalex.org/W2164116828","https://openalex.org/W2167967857","https://openalex.org/W2230664494","https://openalex.org/W6638563171","https://openalex.org/W6677986751"],"related_works":["https://openalex.org/W4390550886","https://openalex.org/W3217463396","https://openalex.org/W2790557758","https://openalex.org/W2516396101","https://openalex.org/W3204929712","https://openalex.org/W4295102875","https://openalex.org/W2183015194","https://openalex.org/W2015155483","https://openalex.org/W2389800961","https://openalex.org/W1995389502"],"abstract_inverted_index":{"Along":[0],"with":[1,98],"the":[2,23,29,38,69,99],"progress":[3],"of":[4],"advanced":[5],"VLSI":[6],"technology,":[7],"noise":[8,30,59,63,77],"issues":[9],"in":[10,32,42,92],"dynamic":[11,33],"circuits":[12,61],"have":[13],"become":[14],"an":[15],"imperative":[16],"design":[17,26],"challenge.":[18],"The":[19],"twin-transistor":[20,101],"design,":[21],"is":[22,54],"current":[24],"state-of-the-art":[25],"to":[27,57],"enhance":[28],"immunity":[31],"CMOS":[34],"circuits.":[35],"To":[36],"achieve":[37,74],"high":[39],"noise-tolerant":[40,50],"capability,":[41],"this":[43],"paper,":[44],"we":[45],"propose":[46],"a":[47,55],"new":[48],"isolated":[49],"(INT)":[51],"technique":[52],"which":[53],"mechanism":[56],"isolate":[58],"tolerant":[60],"from":[62],"interference.":[64],"Simulation":[65],"results":[66],"show":[67],"that":[68],"proposed":[70],"8-bitINTManchester":[71],"adder":[72,103],"can":[73,85],"1.66times":[75],"average":[76],"threshold":[78],"energy":[79],"(ANTE)":[80],"improvement.":[81],"In":[82],"addition,":[83],"it":[84],"save":[86],"34%":[87],"power":[88],"delay":[89],"product":[90],"(PDP)":[91],"low":[93],"signal-to-noise":[94],"ratio(SNR)environments":[95],"as":[96],"compared":[97],"8-bit":[100],"Manchester":[102],"under":[104],"TSMC":[105],"0.18-mu":[106],"m":[107],"process.":[108]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":2}],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2025-10-10T00:00:00"}
