{"id":"https://openalex.org/W2162851503","doi":"https://doi.org/10.1109/tvlsi.2008.2000731","title":"Low-Power Mixed-Signal CVNS-Based 64-Bit Adder for Media Signal Processing","display_name":"Low-Power Mixed-Signal CVNS-Based 64-Bit Adder for Media Signal Processing","publication_year":2008,"publication_date":"2008-08-19","ids":{"openalex":"https://openalex.org/W2162851503","doi":"https://doi.org/10.1109/tvlsi.2008.2000731","mag":"2162851503"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2008.2000731","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2008.2000731","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5042170452","display_name":"Mitra Mirhassani","orcid":"https://orcid.org/0000-0001-8512-6427"},"institutions":[{"id":"https://openalex.org/I74413500","display_name":"University of Windsor","ror":"https://ror.org/01gw3d370","country_code":"CA","type":"education","lineage":["https://openalex.org/I74413500"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"M. Mirhassani","raw_affiliation_strings":["Electrical and Computer Engineering Department, University of Windsor, Windsor, ONT, Canada"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Department, University of Windsor, Windsor, ONT, Canada","institution_ids":["https://openalex.org/I74413500"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035412745","display_name":"Majid Ahmadi","orcid":"https://orcid.org/0000-0001-5781-6754"},"institutions":[{"id":"https://openalex.org/I74413500","display_name":"University of Windsor","ror":"https://ror.org/01gw3d370","country_code":"CA","type":"education","lineage":["https://openalex.org/I74413500"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"M. Ahmadi","raw_affiliation_strings":["Electrical and Computer Engineering Department, University of Windsor, Windsor, ONT, Canada"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Department, University of Windsor, Windsor, ONT, Canada","institution_ids":["https://openalex.org/I74413500"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5007393900","display_name":"G.A. Jullien","orcid":"https://orcid.org/0009-0009-0911-2926"},"institutions":[{"id":"https://openalex.org/I74413500","display_name":"University of Windsor","ror":"https://ror.org/01gw3d370","country_code":"CA","type":"education","lineage":["https://openalex.org/I74413500"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"G.A. Jullien","raw_affiliation_strings":["Electrical and Computer Engineering Department, University of Windsor, Windsor, ONT, Canada"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Department, University of Windsor, Windsor, ONT, Canada","institution_ids":["https://openalex.org/I74413500"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5042170452"],"corresponding_institution_ids":["https://openalex.org/I74413500"],"apc_list":null,"apc_paid":null,"fwci":2.9965,"has_fulltext":false,"cited_by_count":17,"citation_normalized_percentile":{"value":0.91437764,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"16","issue":"9","first_page":"1141","last_page":"1150"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.9491007328033447},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6400219202041626},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.613845705986023},{"id":"https://openalex.org/keywords/16-bit","display_name":"16-bit","score":0.5447484254837036},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.538704514503479},{"id":"https://openalex.org/keywords/serial-binary-adder","display_name":"Serial binary adder","score":0.5374295115470886},{"id":"https://openalex.org/keywords/carry-save-adder","display_name":"Carry-save adder","score":0.5189194679260254},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.47907501459121704},{"id":"https://openalex.org/keywords/4-bit","display_name":"4-bit","score":0.4546149969100952},{"id":"https://openalex.org/keywords/8-bit","display_name":"8-bit","score":0.4362202286720276},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.41605061292648315},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.3390257656574249},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.33642494678497314},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.31750643253326416},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.18860694766044617},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18438655138015747},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.13226252794265747}],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.9491007328033447},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6400219202041626},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.613845705986023},{"id":"https://openalex.org/C33652231","wikidata":"https://www.wikidata.org/wiki/Q194368","display_name":"16-bit","level":2,"score":0.5447484254837036},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.538704514503479},{"id":"https://openalex.org/C116206932","wikidata":"https://www.wikidata.org/wiki/Q7454686","display_name":"Serial binary adder","level":4,"score":0.5374295115470886},{"id":"https://openalex.org/C3227080","wikidata":"https://www.wikidata.org/wiki/Q5046770","display_name":"Carry-save adder","level":4,"score":0.5189194679260254},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.47907501459121704},{"id":"https://openalex.org/C194986542","wikidata":"https://www.wikidata.org/wiki/Q229932","display_name":"4-bit","level":3,"score":0.4546149969100952},{"id":"https://openalex.org/C187919765","wikidata":"https://www.wikidata.org/wiki/Q270159","display_name":"8-bit","level":2,"score":0.4362202286720276},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.41605061292648315},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.3390257656574249},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.33642494678497314},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.31750643253326416},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.18860694766044617},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18438655138015747},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.13226252794265747},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2008.2000731","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2008.2000731","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8799999952316284,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W658439742","https://openalex.org/W1566907904","https://openalex.org/W1586711087","https://openalex.org/W1852365714","https://openalex.org/W1879578558","https://openalex.org/W2005128309","https://openalex.org/W2015266506","https://openalex.org/W2029147567","https://openalex.org/W2091295386","https://openalex.org/W2105943308","https://openalex.org/W2109072162","https://openalex.org/W2111995368","https://openalex.org/W2128007881","https://openalex.org/W2134438536","https://openalex.org/W2141825982","https://openalex.org/W2149009819","https://openalex.org/W2150150807","https://openalex.org/W2155470578","https://openalex.org/W2156413870","https://openalex.org/W2532493179","https://openalex.org/W2542643947","https://openalex.org/W6635270119","https://openalex.org/W6673632692"],"related_works":["https://openalex.org/W2997250644","https://openalex.org/W2333351870","https://openalex.org/W2997259386","https://openalex.org/W4231604344","https://openalex.org/W3163255384","https://openalex.org/W1484354180","https://openalex.org/W4295713091","https://openalex.org/W2395826134","https://openalex.org/W2182007062","https://openalex.org/W2519701464"],"abstract_inverted_index":{"In":[0],"this":[1,89],"paper,":[2],"design":[3,50,82],"of":[4,33,40,83,91,107,112,120],"a":[5,103],"mixed-signal":[6],"64-bit":[7,20,94],"adder":[8,21,56,85,95],"based":[9],"on":[10,69],"the":[11,34,38,44,84,117],"continuous":[12],"valued":[13],"number":[14,39],"system":[15],"(CVNS)":[16],"is":[17,22,86],"presented.":[18],"The":[19,76,93],"generated":[23],"by":[24],"cascading":[25],"four":[26,63],"16-bit":[27],"radix-2":[28],"CVNS":[29,35],"adders.":[30],"Truncated":[31],"summation":[32],"digits":[36],"reduced":[37,49],"required":[41],"interconnections":[42],"in":[43,47,97],"system,":[45],"which":[46],"turn":[48],"complexity":[51],"and":[52,78,80],"hardware":[53],"costs.":[54],"This":[55],"can":[57],"perform":[58],"one":[59],"64-bit,":[60],"two":[61],"32-bit,":[62],"16-bit,":[64],"or":[65],"eight":[66],"8-bit":[67],"additions":[68],"demand":[70],"for":[71,88],"media":[72],"signal":[73],"processing":[74],"applications.":[75],"compact":[77],"low-power":[79],"low-noise":[81],"suitable":[87],"type":[90],"application.":[92],"designed":[96],"TSMC":[98],"CMOS":[99],"0.18-mum":[100],"technology,":[101],"has":[102],"worst":[104],"case":[105],"delay":[106],"1.5":[108],"ns,":[109],"energy":[110],"dissipation":[111],"about":[113],"14":[114],"pJ":[115],"with":[116],"core":[118],"area":[119],"13":[121],"250mum":[122],"<sup":[123],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[124],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[125],".":[126]},"counts_by_year":[{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}