{"id":"https://openalex.org/W2121797451","doi":"https://doi.org/10.1109/tvlsi.2008.2000730","title":"A Comparative Study Between Static and Dynamic Sleep Signal Generation Techniques for Leakage Tolerant Designs","display_name":"A Comparative Study Between Static and Dynamic Sleep Signal Generation Techniques for Leakage Tolerant Designs","publication_year":2008,"publication_date":"2008-08-04","ids":{"openalex":"https://openalex.org/W2121797451","doi":"https://doi.org/10.1109/tvlsi.2008.2000730","mag":"2121797451"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2008.2000730","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2008.2000730","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5085619466","display_name":"Ahmed A. F. Youssef","orcid":"https://orcid.org/0000-0001-5612-9514"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Ahmed Youssef","raw_affiliation_strings":["Dept. of Electr. & Comput. Eng., Waterloo Univ., Waterloo, ON","Dept. of Electr. & Comput. Eng., Waterloo Univ., Waterloo, ON#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Waterloo Univ., Waterloo, ON","institution_ids":["https://openalex.org/I151746483"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Waterloo Univ., Waterloo, ON#TAB#","institution_ids":["https://openalex.org/I151746483"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112829693","display_name":"Mohab Anis","orcid":null},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Mohab Anis","raw_affiliation_strings":["Dept. of Electr. & Comput. Eng., Waterloo Univ., Waterloo, ON","Dept. of Electr. & Comput. Eng., Waterloo Univ., Waterloo, ON#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Waterloo Univ., Waterloo, ON","institution_ids":["https://openalex.org/I151746483"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Waterloo Univ., Waterloo, ON#TAB#","institution_ids":["https://openalex.org/I151746483"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111957282","display_name":"M. Elmasry","orcid":null},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Mohamed Elmasry","raw_affiliation_strings":["Dept. of Electr. & Comput. Eng., Waterloo Univ., Waterloo, ON","Dept. of Electr. & Comput. Eng., Waterloo Univ., Waterloo, ON#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Waterloo Univ., Waterloo, ON","institution_ids":["https://openalex.org/I151746483"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Waterloo Univ., Waterloo, ON#TAB#","institution_ids":["https://openalex.org/I151746483"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.3742,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.88882689,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":"16","issue":"9","first_page":"1114","last_page":"1126"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/power-gating","display_name":"Power gating","score":0.8997364640235901},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6584346294403076},{"id":"https://openalex.org/keywords/sleep-mode","display_name":"Sleep mode","score":0.6377720236778259},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.5571693778038025},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.479660302400589},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.4660182297229767},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.44342225790023804},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3609304428100586},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.3518993854522705},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.2212318480014801},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21728530526161194},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.21464431285858154},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.16480478644371033},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.11481156945228577}],"concepts":[{"id":"https://openalex.org/C2780700455","wikidata":"https://www.wikidata.org/wiki/Q7236515","display_name":"Power gating","level":4,"score":0.8997364640235901},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6584346294403076},{"id":"https://openalex.org/C57149124","wikidata":"https://www.wikidata.org/wiki/Q587346","display_name":"Sleep mode","level":4,"score":0.6377720236778259},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.5571693778038025},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.479660302400589},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.4660182297229767},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.44342225790023804},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3609304428100586},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3518993854522705},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.2212318480014801},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21728530526161194},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.21464431285858154},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.16480478644371033},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.11481156945228577},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2008.2000730","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2008.2000730","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8899999856948853,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":39,"referenced_works":["https://openalex.org/W193979539","https://openalex.org/W206982311","https://openalex.org/W1510808677","https://openalex.org/W1522012667","https://openalex.org/W1527024979","https://openalex.org/W1927590974","https://openalex.org/W1949737515","https://openalex.org/W1986465830","https://openalex.org/W1996086722","https://openalex.org/W2017370932","https://openalex.org/W2018298029","https://openalex.org/W2042885725","https://openalex.org/W2070015279","https://openalex.org/W2083626899","https://openalex.org/W2100257928","https://openalex.org/W2103227017","https://openalex.org/W2104225326","https://openalex.org/W2105743938","https://openalex.org/W2107493680","https://openalex.org/W2109279764","https://openalex.org/W2109797003","https://openalex.org/W2111880608","https://openalex.org/W2124276471","https://openalex.org/W2131667412","https://openalex.org/W2131862714","https://openalex.org/W2143171378","https://openalex.org/W2145071646","https://openalex.org/W2147191452","https://openalex.org/W2152001712","https://openalex.org/W2153478340","https://openalex.org/W2158899676","https://openalex.org/W2171825402","https://openalex.org/W4236166192","https://openalex.org/W4253029824","https://openalex.org/W4253421865","https://openalex.org/W4253620068","https://openalex.org/W4256338358","https://openalex.org/W6675468258","https://openalex.org/W6818035614"],"related_works":["https://openalex.org/W2972036948","https://openalex.org/W2021918087","https://openalex.org/W2324305405","https://openalex.org/W2139542266","https://openalex.org/W4378175625","https://openalex.org/W3208532083","https://openalex.org/W3009963418","https://openalex.org/W2102121056","https://openalex.org/W2143058458","https://openalex.org/W3135068662"],"abstract_inverted_index":{"Power":[0,20],"gating":[1,21,41],"techniques":[2,42,190],"are":[3],"rapidly":[4],"gaining":[5],"popularity":[6],"assisting":[7,184],"the":[8,31,49,53,73,77,92,97,104,116,122,133,142,145,161,176,193],"management":[9],"of":[10,52,86,94,107,140,144,158],"leakage":[11,37,174],"power":[12,40,194],"consumption":[13],"for":[14,82,160],"deep":[15],"submicrometer":[16],"microprocessors'":[17],"functional":[18,32,54,78,146],"units.":[19],"is":[22,60,80,100,138,180],"based":[23],"on":[24,103,192],"an":[25,156],"input":[26],"sleep":[27,74,98,135,163],"signal":[28,75,99,136,164],"to":[29,152,155,171],"set":[30],"unit":[33,79],"into":[34],"a":[35,67,83,112],"low":[36],"mode.":[38],"However,":[39],"in":[43,183],"general":[44],"inherently":[45],"lack":[46],"information":[47],"about":[48],"utilization":[50],"profile":[51],"units":[55,147],"they":[56],"manage.":[57],"This":[58,178],"limitation":[59],"usually":[61],"handled":[62],"either":[63],"statically":[64],"by":[65,90],"using":[66],"fixed":[68],"length":[69],"counter":[70],"that":[71,132],"generates":[72],"when":[76],"idle":[81],"specified":[84],"number":[85,93],"cycles":[87,95],"or":[88],"dynamically":[89],"changing":[91],"before":[96],"generated":[101],"depending":[102,191],"previous":[105],"history":[106],"operation.":[108],"In":[109],"this":[110],"paper,":[111],"comparative":[113],"study":[114,179],"between":[115,188],"static":[117,162],"and":[118],"dynamic":[119,134],"approaches":[120],"regarding":[121],"power-performance":[123],"tradeoff":[124],"will":[125,129],"be":[126,130],"presented.":[127],"It":[128],"shown":[131],"generator":[137,165],"capable":[139],"tracking":[141],"operation":[143],"while":[148],"achieving":[149],"accuracies":[150],"up":[151,170],"90%":[153],"compared":[154],"average":[157],"40%-60%":[159],"(SSSG).":[166],"Additionally":[167],"it":[168],"saves":[169],"80%":[172],"more":[173],"versus":[175],"SSSG.":[177],"very":[181],"important":[182],"circuit":[185],"designers":[186],"choose":[187],"both":[189],"gated":[195],"circuit.":[196]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":4}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}