{"id":"https://openalex.org/W2051147619","doi":"https://doi.org/10.1109/tsp.2011.6043675","title":"A low area FIR filter for FPGA implementation","display_name":"A low area FIR filter for FPGA implementation","publication_year":2011,"publication_date":"2011-08-01","ids":{"openalex":"https://openalex.org/W2051147619","doi":"https://doi.org/10.1109/tsp.2011.6043675","mag":"2051147619"},"language":"en","primary_location":{"id":"doi:10.1109/tsp.2011.6043675","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tsp.2011.6043675","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 34th International Conference on Telecommunications and Signal Processing (TSP)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102931864","display_name":"C\u0103t\u0103lin Damian","orcid":"https://orcid.org/0000-0002-4435-5642"},"institutions":[{"id":"https://openalex.org/I4210108695","display_name":"Gheorghe Asachi Technical University of Ia\u0219i","ror":"https://ror.org/014zxnz40","country_code":"RO","type":"education","lineage":["https://openalex.org/I4210108695"]}],"countries":["RO"],"is_corresponding":false,"raw_author_name":"Catalin Damian","raw_affiliation_strings":["Faculty of Electrical Engineering, Gheorghe Asachi Technical University of Iasi, Iasi, Romania","Gh. Asachi Technical University of Iasi, Faculty of Electrical Engineering, Bd. D. Mangeron, 53, 700050, Iasi, Romania"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Electrical Engineering, Gheorghe Asachi Technical University of Iasi, Iasi, Romania","institution_ids":["https://openalex.org/I4210108695"]},{"raw_affiliation_string":"Gh. Asachi Technical University of Iasi, Faculty of Electrical Engineering, Bd. D. Mangeron, 53, 700050, Iasi, Romania","institution_ids":["https://openalex.org/I4210108695"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5062223991","display_name":"Eduard Lunc\u0103","orcid":"https://orcid.org/0000-0001-6832-6056"},"institutions":[{"id":"https://openalex.org/I4210108695","display_name":"Gheorghe Asachi Technical University of Ia\u0219i","ror":"https://ror.org/014zxnz40","country_code":"RO","type":"education","lineage":["https://openalex.org/I4210108695"]}],"countries":["RO"],"is_corresponding":false,"raw_author_name":"Eduard Lunca","raw_affiliation_strings":["Faculty of Electrical Engineering, Gheorghe Asachi Technical University of Iasi, Iasi, Romania","Gh. Asachi Technical University of Iasi, Faculty of Electrical Engineering, Bd. D. Mangeron, 53, 700050, Iasi, Romania"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Electrical Engineering, Gheorghe Asachi Technical University of Iasi, Iasi, Romania","institution_ids":["https://openalex.org/I4210108695"]},{"raw_affiliation_string":"Gh. Asachi Technical University of Iasi, Faculty of Electrical Engineering, Bd. D. Mangeron, 53, 700050, Iasi, Romania","institution_ids":["https://openalex.org/I4210108695"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4210108695"],"apc_list":null,"apc_paid":null,"fwci":0.6241,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.66697057,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"521","last_page":"524"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11233","display_name":"Advanced Adaptive Filtering Techniques","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2206","display_name":"Computational Mechanics"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/finite-impulse-response","display_name":"Finite impulse response","score":0.9185289740562439},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8580552339553833},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.8311619162559509},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6178821921348572},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.5300081968307495},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.5200964212417603},{"id":"https://openalex.org/keywords/digital-filter","display_name":"Digital filter","score":0.4572533965110779},{"id":"https://openalex.org/keywords/gate-array","display_name":"Gate array","score":0.4425990879535675},{"id":"https://openalex.org/keywords/multiplication","display_name":"Multiplication (music)","score":0.4161231517791748},{"id":"https://openalex.org/keywords/filter-design","display_name":"Filter design","score":0.4105924069881439},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3568307161331177},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.34670913219451904},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.23634681105613708},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09427767992019653}],"concepts":[{"id":"https://openalex.org/C198386975","wikidata":"https://www.wikidata.org/wiki/Q117785","display_name":"Finite impulse response","level":2,"score":0.9185289740562439},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8580552339553833},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.8311619162559509},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6178821921348572},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.5300081968307495},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.5200964212417603},{"id":"https://openalex.org/C36390408","wikidata":"https://www.wikidata.org/wiki/Q1163067","display_name":"Digital filter","level":3,"score":0.4572533965110779},{"id":"https://openalex.org/C114237110","wikidata":"https://www.wikidata.org/wiki/Q114901","display_name":"Gate array","level":3,"score":0.4425990879535675},{"id":"https://openalex.org/C2780595030","wikidata":"https://www.wikidata.org/wiki/Q3860309","display_name":"Multiplication (music)","level":2,"score":0.4161231517791748},{"id":"https://openalex.org/C22597639","wikidata":"https://www.wikidata.org/wiki/Q5449227","display_name":"Filter design","level":3,"score":0.4105924069881439},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3568307161331177},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.34670913219451904},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.23634681105613708},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09427767992019653},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tsp.2011.6043675","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tsp.2011.6043675","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 34th International Conference on Telecommunications and Signal Processing (TSP)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.5099999904632568}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1570127032","https://openalex.org/W1932349882","https://openalex.org/W1991900639","https://openalex.org/W2113289989","https://openalex.org/W2126788748","https://openalex.org/W4249557201","https://openalex.org/W6640634552"],"related_works":["https://openalex.org/W3082309838","https://openalex.org/W2058793688","https://openalex.org/W1902114972","https://openalex.org/W2810377961","https://openalex.org/W126808228","https://openalex.org/W1505918581","https://openalex.org/W2046083070","https://openalex.org/W2379702749","https://openalex.org/W1751484597","https://openalex.org/W4308935600"],"abstract_inverted_index":{"This":[0,45],"paper":[1],"proposes":[2],"a":[3,14,21,49,62],"high":[4],"speed":[5],"and":[6,42],"low":[7],"area":[8],"architecture":[9],"for":[10],"the":[11,59],"implementation":[12],"of":[13],"FIR":[15,30],"(Finite":[16],"Impulse":[17],"Response)":[18],"filter":[19,31],"into":[20],"Field":[22],"Programmable":[23],"Gate":[24],"Array":[25],"(FPGA)":[26],"device.":[27],"The":[28],"new":[29],"type":[32],"is":[33,46,52],"implemented":[34],"with":[35],"no":[36],"multiplication":[37],"block,":[38],"using":[39,54],"only":[40],"adders":[41],"shifting":[43],"registers.":[44],"possible":[47],"because":[48],"coefficient":[50],"approximation":[51],"performed,":[53],"an":[55],"algorithm":[56],"that":[57],"computes":[58],"coefficients":[60],"like":[61],"sum-of-power-of-two":[63],"terms.":[64]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2014,"cited_by_count":2}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}
