{"id":"https://openalex.org/W2159742333","doi":"https://doi.org/10.1109/tsp.2011.2168525","title":"A Methodology for Speeding Up Fast Fourier Transform Focusing on Memory Architecture Utilization","display_name":"A Methodology for Speeding Up Fast Fourier Transform Focusing on Memory Architecture Utilization","publication_year":2011,"publication_date":"2011-09-23","ids":{"openalex":"https://openalex.org/W2159742333","doi":"https://doi.org/10.1109/tsp.2011.2168525","mag":"2159742333"},"language":"en","primary_location":{"id":"doi:10.1109/tsp.2011.2168525","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tsp.2011.2168525","pdf_url":null,"source":{"id":"https://openalex.org/S168680287","display_name":"IEEE Transactions on Signal Processing","issn_l":"1053-587X","issn":["1053-587X","1941-0476"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Signal Processing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5090157400","display_name":"Vasilios Kelefouras","orcid":"https://orcid.org/0000-0001-9591-913X"},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":true,"raw_author_name":"Vasilios I. Kelefouras","raw_affiliation_strings":["Department of Electrical Engineering, Patras University, Patras, Greece"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Patras University, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103066193","display_name":"George S. Athanasiou","orcid":"https://orcid.org/0000-0002-3221-7189"},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"George S. Athanasiou","raw_affiliation_strings":["Department of Electrical Engineering, Patras University, Patras, Greece"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Patras University, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020046542","display_name":"Nikolaos S. Alachiotis","orcid":"https://orcid.org/0000-0002-9932-7964"},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Nikolaos Alachiotis","raw_affiliation_strings":["Department of Electrical Engineering, Patras University, Patras, Greece"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Patras University, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110387176","display_name":"Harris E. Michail","orcid":null},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Harris E. Michail","raw_affiliation_strings":["Department of Electrical Engineering, Patras University, Patras, Greece"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Patras University, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058810601","display_name":"Angeliki Kritikakou","orcid":"https://orcid.org/0000-0002-9293-469X"},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Angeliki S. Kritikakou","raw_affiliation_strings":["Department of Electrical Engineering, Patras University, Patras, Greece"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Patras University, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111773679","display_name":"Costas E. Goutis","orcid":null},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Costas E. Goutis","raw_affiliation_strings":["Department of Electrical Engineering, Patras University, Patras, Greece"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Patras University, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5090157400"],"corresponding_institution_ids":["https://openalex.org/I174878644"],"apc_list":null,"apc_paid":null,"fwci":1.5112,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.84432567,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"59","issue":"12","first_page":"6217","last_page":"6226"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9919999837875366,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9907000064849854,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.845156192779541},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.7756605744361877},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.7619749903678894},{"id":"https://openalex.org/keywords/memory-hierarchy","display_name":"Memory hierarchy","score":0.6790454387664795},{"id":"https://openalex.org/keywords/fast-fourier-transform","display_name":"Fast Fourier transform","score":0.6533835530281067},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.6021586656570435},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.5760208368301392},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.5353913903236389},{"id":"https://openalex.org/keywords/cache-oblivious-algorithm","display_name":"Cache-oblivious algorithm","score":0.5295261740684509},{"id":"https://openalex.org/keywords/cache-pollution","display_name":"Cache pollution","score":0.4768872559070587},{"id":"https://openalex.org/keywords/kernel","display_name":"Kernel (algebra)","score":0.41945868730545044},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3191659450531006},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.09846064448356628}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.845156192779541},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7756605744361877},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.7619749903678894},{"id":"https://openalex.org/C2778100165","wikidata":"https://www.wikidata.org/wiki/Q1589327","display_name":"Memory hierarchy","level":3,"score":0.6790454387664795},{"id":"https://openalex.org/C75172450","wikidata":"https://www.wikidata.org/wiki/Q623950","display_name":"Fast Fourier transform","level":2,"score":0.6533835530281067},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.6021586656570435},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.5760208368301392},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.5353913903236389},{"id":"https://openalex.org/C59687516","wikidata":"https://www.wikidata.org/wiki/Q5015938","display_name":"Cache-oblivious algorithm","level":5,"score":0.5295261740684509},{"id":"https://openalex.org/C113166858","wikidata":"https://www.wikidata.org/wiki/Q5015981","display_name":"Cache pollution","level":5,"score":0.4768872559070587},{"id":"https://openalex.org/C74193536","wikidata":"https://www.wikidata.org/wiki/Q574844","display_name":"Kernel (algebra)","level":2,"score":0.41945868730545044},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3191659450531006},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.09846064448356628},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0}],"mesh":[],"locations_count":4,"locations":[{"id":"doi:10.1109/tsp.2011.2168525","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tsp.2011.2168525","pdf_url":null,"source":{"id":"https://openalex.org/S168680287","display_name":"IEEE Transactions on Signal Processing","issn_l":"1053-587X","issn":["1053-587X","1941-0476"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Signal Processing","raw_type":"journal-article"},{"id":"pmh:oai:ktisis.cut.ac.cy:10488/7307","is_oa":false,"landing_page_url":"http://ktisis.cut.ac.cy/handle/10488/7307","pdf_url":null,"source":{"id":"https://openalex.org/S4306400897","display_name":"Ktisis at Cyprus University of Technology (Cyprus University of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I163151358","host_organization_name":"Cyprus University of Technology","host_organization_lineage":["https://openalex.org/I163151358"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Article"},{"id":"pmh:oai:ktisis.cut.ac.cy:20.500.14279/1640","is_oa":false,"landing_page_url":"https://hdl.handle.net/20.500.14279/1640","pdf_url":null,"source":{"id":"https://openalex.org/S4306400897","display_name":"Ktisis at Cyprus University of Technology (Cyprus University of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I163151358","host_organization_name":"Cyprus University of Technology","host_organization_lineage":["https://openalex.org/I163151358"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"article"},{"id":"pmh:oai:shura.shu.ac.uk:18334","is_oa":false,"landing_page_url":"http://shura.shu.ac.uk/18334/","pdf_url":null,"source":{"id":"https://openalex.org/S4306401600","display_name":"SHURA (Sheffield Hallam University Research Archive) (Sheffield Hallam University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I71422933","host_organization_name":"Sheffield Hallam University","host_organization_lineage":["https://openalex.org/I71422933"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W32350989","https://openalex.org/W71899047","https://openalex.org/W1515135833","https://openalex.org/W1631114303","https://openalex.org/W1866830630","https://openalex.org/W1964031104","https://openalex.org/W1972114761","https://openalex.org/W2032094184","https://openalex.org/W2077115703","https://openalex.org/W2095875205","https://openalex.org/W2096070062","https://openalex.org/W2102182691","https://openalex.org/W2108399176","https://openalex.org/W2115894154","https://openalex.org/W2117900096","https://openalex.org/W2135031801","https://openalex.org/W2164197394","https://openalex.org/W2164834346","https://openalex.org/W2478884216","https://openalex.org/W4231413142","https://openalex.org/W6602854264","https://openalex.org/W6636837104","https://openalex.org/W6639204654","https://openalex.org/W6677473723"],"related_works":["https://openalex.org/W2098406302","https://openalex.org/W2121191383","https://openalex.org/W2538519144","https://openalex.org/W2546991807","https://openalex.org/W1584415117","https://openalex.org/W1505654810","https://openalex.org/W2076114130","https://openalex.org/W4252570104","https://openalex.org/W2734782074","https://openalex.org/W2109265242"],"abstract_inverted_index":{"Several":[0],"SOA":[1],"(state":[2],"of":[3,34,59,62,66,69,73,108,112,120,156,165,168,179,219,240],"the":[4,12,17,32,40,60,63,67,74,106,147,154,157,159,163,166,172,177,180,184],"art)":[5],"self-tuning":[6],"software":[7,36],"libraries":[8],"exist,":[9],"such":[10],"as":[11],"Fastest":[13],"Fourier":[14,22],"Transform":[15],"in":[16,252],"West":[18],"(FFTW)":[19],"for":[20,221,244],"fast":[21],"transform":[23],"(FFT).":[24],"FFT":[25,117],"is":[26,57,77,87,150],"a":[27,54,78,84,232],"highly":[28],"important":[29],"kernel":[30],"and":[31,48,65,71,110,123,128,132,143,183,194,200,237],"performance":[33,91,214,236],"its":[35],"implementations":[37],"depends":[38],"on":[39,94,235,242],"memory":[41,95,174,229],"hierarchy's":[42],"utilization.":[43,97],"FFTW":[44],"minimizes":[45],"register":[46],"spills":[47],"data":[49,115,160,169,181,185,225,248],"cache":[50,161,170,186,226,249],"accesses":[51],"by":[52,92,126,130],"finding":[53],"schedule":[55],"that":[56],"independent":[58],"number":[61,68,155,164],"registers":[64],"levels":[70,167],"size":[72,203],"cache,":[75],"which":[76,189],"serious":[79],"drawback.":[80],"In":[81],"this":[82],"paper,":[83],"new":[85],"methodology":[86,100,212],"presented,":[88],"achieving":[89],"improved":[90],"focusing":[93],"hierarchy":[96],"The":[98,210],"proposed":[99,211],"has":[101,231],"three":[102],"major":[103],"advantages.":[104],"First,":[105],"combination":[107],"production":[109],"consumption":[111],"butterflies'":[113],"results,":[114],"reuse,":[116],"parallelism,":[118],"symmetries":[119],"twiddle":[121,135],"factors":[122,136],"also":[124,191],"additions":[125],"zeros":[127,131],"multiplications":[129],"ones":[133],"when":[134],"are":[137,141,190,204],"zero":[138],"or":[139],"one,":[140],"fully":[142],"simultaneously":[144,193],"exploited.":[145],"Second,":[146],"optimal":[148],"solution":[149],"found":[151],"according":[152],"to":[153],"registers,":[158],"sizes,":[162,188],"hierarchy,":[171],"main":[173],"page":[175],"size,":[176],"associativity":[178],"caches":[182],"line":[187],"considered":[192],"not":[195],"separate.":[196],"Third,":[197],"compilation":[198],"time":[199],"source":[201],"code":[202],"very":[205],"small":[206,224],"compared":[207],"with":[208,223,246,254],"FFTW.":[209,255],"achieves":[213],"gain":[215],"about":[216],"40%":[217],"(speed-up":[218,239],"1.7)":[220],"architectures":[222,245],"sizes":[227,250],"where":[228],"management":[230],"larger":[233],"effect":[234],"20%":[238],"1.25)":[241],"average":[243],"large":[247],"(Pentium)":[251],"comparison":[253]},"counts_by_year":[{"year":2022,"cited_by_count":2},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2016-06-24T00:00:00"}