{"id":"https://openalex.org/W2163568316","doi":"https://doi.org/10.1109/tsp.2011.2159495","title":"High-Speed Parallel Architectures for Linear Feedback Shift Registers","display_name":"High-Speed Parallel Architectures for Linear Feedback Shift Registers","publication_year":2011,"publication_date":"2011-06-20","ids":{"openalex":"https://openalex.org/W2163568316","doi":"https://doi.org/10.1109/tsp.2011.2159495","mag":"2163568316"},"language":"en","primary_location":{"id":"doi:10.1109/tsp.2011.2159495","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tsp.2011.2159495","pdf_url":null,"source":{"id":"https://openalex.org/S168680287","display_name":"IEEE Transactions on Signal Processing","issn_l":"1053-587X","issn":["1053-587X","1941-0476"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Signal Processing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5087373702","display_name":"Manohar Ayinala","orcid":null},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Manohar Ayinala","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5007884053","display_name":"Keshab K. Parhi","orcid":"https://orcid.org/0000-0001-6543-2793"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Keshab K. Parhi","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5087373702"],"corresponding_institution_ids":["https://openalex.org/I130238516"],"apc_list":null,"apc_paid":null,"fwci":2.5184,"has_fulltext":false,"cited_by_count":62,"citation_normalized_percentile":{"value":0.90521191,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"59","issue":"9","first_page":"4459","last_page":"4469"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6253038048744202},{"id":"https://openalex.org/keywords/shift-register","display_name":"Shift register","score":0.5538281202316284},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.46077343821525574},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.4358220398426056},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3434866666793823},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.23542356491088867},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.21873000264167786},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.1789560317993164}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6253038048744202},{"id":"https://openalex.org/C49654631","wikidata":"https://www.wikidata.org/wiki/Q746165","display_name":"Shift register","level":3,"score":0.5538281202316284},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.46077343821525574},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.4358220398426056},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3434866666793823},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.23542356491088867},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.21873000264167786},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.1789560317993164},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tsp.2011.2159495","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tsp.2011.2159495","pdf_url":null,"source":{"id":"https://openalex.org/S168680287","display_name":"IEEE Transactions on Signal Processing","issn_l":"1053-587X","issn":["1053-587X","1941-0476"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Signal Processing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.5,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":36,"referenced_works":["https://openalex.org/W1501488688","https://openalex.org/W1534925464","https://openalex.org/W1569612250","https://openalex.org/W1593683169","https://openalex.org/W1977467261","https://openalex.org/W1980308149","https://openalex.org/W1982634620","https://openalex.org/W1993126145","https://openalex.org/W2036798671","https://openalex.org/W2038133289","https://openalex.org/W2039180745","https://openalex.org/W2044896248","https://openalex.org/W2058270583","https://openalex.org/W2063595777","https://openalex.org/W2091152062","https://openalex.org/W2093030849","https://openalex.org/W2098096537","https://openalex.org/W2099736035","https://openalex.org/W2102695687","https://openalex.org/W2110078994","https://openalex.org/W2110269656","https://openalex.org/W2117101898","https://openalex.org/W2120173944","https://openalex.org/W2126528878","https://openalex.org/W2131092434","https://openalex.org/W2131611875","https://openalex.org/W2135671115","https://openalex.org/W2138955610","https://openalex.org/W2147168328","https://openalex.org/W2149286506","https://openalex.org/W2152697228","https://openalex.org/W2204394634","https://openalex.org/W2532156082","https://openalex.org/W2703275807","https://openalex.org/W3126588943","https://openalex.org/W6740663703"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2051487156","https://openalex.org/W2073681303","https://openalex.org/W2390279801","https://openalex.org/W2358668433","https://openalex.org/W2376932109","https://openalex.org/W2001405890","https://openalex.org/W1979635423","https://openalex.org/W2382290278","https://openalex.org/W2478288626"],"abstract_inverted_index":{"Linear":[0],"feedback":[1,139],"shift":[2],"register":[3],"(LFSR)":[4],"is":[5,24,87,132],"an":[6,64,97],"important":[7],"component":[8],"of":[9,21,34,36,63,96,124],"the":[10,57,61,91,94,125,129,153,185],"cyclic":[11],"redundancy":[12],"check":[13],"(CRC)":[14],"operations":[15,79],"and":[16,80,119,138,148],"BCH":[17,81],"encoders.":[18,82],"The":[19,122,160,175],"contribution":[20],"this":[22,28],"paper":[23,29],"two":[25],"fold.":[26],"First,":[27],"presents":[30],"a":[31,37,52,84,105],"mathematical":[32],"proof":[33],"existence":[35],"linear":[38],"transformation":[39,50],"to":[40,56,72,89,144,151,166,184],"transform":[41],"LFSR":[42,92,110,172],"circuits":[43],"into":[44,93],"equivalent":[45],"state":[46],"space":[47],"formulations.":[48],"This":[49,69],"achieves":[51,179],"full":[53],"speed-up":[54],"compared":[55,183],"serial":[58],"architecture":[59,111,178],"at":[60],"cost":[62],"increase":[65],"in":[66,77,156,173],"hardware":[67],"overhead.":[68],"method":[70],"applies":[71],"all":[73],"generator":[74,158,168],"polynomials":[75],"used":[76],"CRC":[78],"Second,":[83],"new":[85],"formulation":[86],"proposed":[88,126,161,176],"modify":[90],"form":[95],"infinite":[98],"impulse":[99],"response":[100],"(IIR)":[101],"filter.":[102],"We":[103,141],"propose":[104,143],"novel":[106],"high":[107],"speed":[108],"parallel":[109,114,147,177],"based":[112],"on":[113],"IIR":[115],"filter":[116],"design,":[117],"pipelining":[118,149],"retiming":[120],"algorithms.":[121],"advantage":[123],"approach":[127],"over":[128],"previous":[130,186],"architectures":[131],"that":[133],"it":[134],"has":[135],"both":[136],"feedforward":[137],"paths.":[140],"further":[142],"apply":[145],"combined":[146],"techniques":[150],"eliminate":[152],"fanout":[154],"effect":[155],"long":[157],"polynomials.":[159],"scheme":[162],"can":[163],"be":[164],"applied":[165],"any":[167,171],"polynomial,":[169],"i.e.,":[170],"general.":[174],"better":[180],"area-time":[181],"product":[182],"designs.":[187]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":9},{"year":2020,"cited_by_count":7},{"year":2019,"cited_by_count":6},{"year":2018,"cited_by_count":5},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":6},{"year":2015,"cited_by_count":9},{"year":2014,"cited_by_count":5},{"year":2013,"cited_by_count":4},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}