{"id":"https://openalex.org/W1974265980","doi":"https://doi.org/10.1109/tr.2014.2336395","title":"A Novel Massively Parallel Testing Method Using Multi-Root for High Reliability","display_name":"A Novel Massively Parallel Testing Method Using Multi-Root for High Reliability","publication_year":2014,"publication_date":"2014-08-06","ids":{"openalex":"https://openalex.org/W1974265980","doi":"https://doi.org/10.1109/tr.2014.2336395","mag":"1974265980"},"language":"en","primary_location":{"id":"doi:10.1109/tr.2014.2336395","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tr.2014.2336395","pdf_url":null,"source":{"id":"https://openalex.org/S87725633","display_name":"IEEE Transactions on Reliability","issn_l":"0018-9529","issn":["0018-9529","1558-1721"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Reliability","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5035282282","display_name":"Haksong Kim","orcid":null},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Haksong Kim","raw_affiliation_strings":["Department of Electrical and Electronics Engineering, Yonsei University, Seoul, Korea","Department of Electrical and Electronics Engineering; Yonsei University; Seoul Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronics Engineering, Yonsei University, Seoul, Korea","institution_ids":["https://openalex.org/I193775966"]},{"raw_affiliation_string":"Department of Electrical and Electronics Engineering; Yonsei University; Seoul Korea","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100627849","display_name":"Yong Lee","orcid":"https://orcid.org/0000-0003-2945-7322"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Yong Lee","raw_affiliation_strings":["Department of Electrical and Electronics Engineering, Yonsei University, Seoul, Korea","Department of Electrical and Electronics Engineering; Yonsei University; Seoul Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronics Engineering, Yonsei University, Seoul, Korea","institution_ids":["https://openalex.org/I193775966"]},{"raw_affiliation_string":"Department of Electrical and Electronics Engineering; Yonsei University; Seoul Korea","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068528309","display_name":"Sungho Kang","orcid":"https://orcid.org/0000-0002-7093-2095"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sungho Kang","raw_affiliation_strings":["Department of Electrical and Electronics Engineering, Yonsei University, Seoul, Korea","Department of Electrical and Electronics Engineering; Yonsei University; Seoul Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronics Engineering, Yonsei University, Seoul, Korea","institution_ids":["https://openalex.org/I193775966"]},{"raw_affiliation_string":"Department of Electrical and Electronics Engineering; Yonsei University; Seoul Korea","institution_ids":["https://openalex.org/I193775966"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I193775966"],"apc_list":null,"apc_paid":null,"fwci":1.5401,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.81611116,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":"64","issue":"1","first_page":"486","last_page":"496"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9958999752998352,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.7352315187454224},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6389188766479492},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.6235561966896057},{"id":"https://openalex.org/keywords/root-cause","display_name":"Root cause","score":0.6219881176948547},{"id":"https://openalex.org/keywords/massively-parallel","display_name":"Massively parallel","score":0.6139112710952759},{"id":"https://openalex.org/keywords/parallelism","display_name":"Parallelism (grammar)","score":0.5570909976959229},{"id":"https://openalex.org/keywords/wafer-testing","display_name":"Wafer testing","score":0.5426000952720642},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.5414656400680542},{"id":"https://openalex.org/keywords/sort","display_name":"sort","score":0.4970872700214386},{"id":"https://openalex.org/keywords/test-method","display_name":"Test method","score":0.4621843099594116},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4047902822494507},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4037170112133026},{"id":"https://openalex.org/keywords/wafer","display_name":"Wafer","score":0.3867335915565491},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20178374648094177},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.11484676599502563},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.0678943395614624}],"concepts":[{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.7352315187454224},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6389188766479492},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.6235561966896057},{"id":"https://openalex.org/C84945661","wikidata":"https://www.wikidata.org/wiki/Q7366567","display_name":"Root cause","level":2,"score":0.6219881176948547},{"id":"https://openalex.org/C190475519","wikidata":"https://www.wikidata.org/wiki/Q544384","display_name":"Massively parallel","level":2,"score":0.6139112710952759},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.5570909976959229},{"id":"https://openalex.org/C44445679","wikidata":"https://www.wikidata.org/wiki/Q2538844","display_name":"Wafer testing","level":3,"score":0.5426000952720642},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.5414656400680542},{"id":"https://openalex.org/C88548561","wikidata":"https://www.wikidata.org/wiki/Q347599","display_name":"sort","level":2,"score":0.4970872700214386},{"id":"https://openalex.org/C132519959","wikidata":"https://www.wikidata.org/wiki/Q3077373","display_name":"Test method","level":2,"score":0.4621843099594116},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4047902822494507},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4037170112133026},{"id":"https://openalex.org/C160671074","wikidata":"https://www.wikidata.org/wiki/Q267131","display_name":"Wafer","level":2,"score":0.3867335915565491},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20178374648094177},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.11484676599502563},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0678943395614624},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C23123220","wikidata":"https://www.wikidata.org/wiki/Q816826","display_name":"Information retrieval","level":1,"score":0.0},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tr.2014.2336395","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tr.2014.2336395","pdf_url":null,"source":{"id":"https://openalex.org/S87725633","display_name":"IEEE Transactions on Reliability","issn_l":"0018-9529","issn":["0018-9529","1558-1721"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Reliability","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.6200000047683716}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1964423804","https://openalex.org/W2007364715","https://openalex.org/W2034978802","https://openalex.org/W2098157515","https://openalex.org/W2104238881","https://openalex.org/W2112990568","https://openalex.org/W2115170364","https://openalex.org/W2119963448","https://openalex.org/W2132110738","https://openalex.org/W2133241273","https://openalex.org/W2143621442","https://openalex.org/W2143816238","https://openalex.org/W2150516314","https://openalex.org/W2153208491","https://openalex.org/W2154318992","https://openalex.org/W2156412034","https://openalex.org/W2159466945","https://openalex.org/W2166930802","https://openalex.org/W2168662569","https://openalex.org/W4231021813","https://openalex.org/W4255307503","https://openalex.org/W6672251357"],"related_works":["https://openalex.org/W1970433854","https://openalex.org/W2023867642","https://openalex.org/W1905852083","https://openalex.org/W113996306","https://openalex.org/W81589881","https://openalex.org/W2028391080","https://openalex.org/W201527569","https://openalex.org/W2097928005","https://openalex.org/W2153208491","https://openalex.org/W3014296441"],"abstract_inverted_index":{"Wafer":[0],"testing":[1,97,123],"(wafer":[2],"sort)":[3],"is":[4,16,26,81],"used":[5],"in":[6,39,67],"the":[7,31,40,44,57,110,114,120,131,147],"semiconductor":[8],"industry":[9],"to":[10,18,77,155],"reduce":[11,19,151],"test":[12,20,35,52,75,106,125,152,161],"costs.":[13],"High":[14],"parallelism":[15,25,60,88],"important":[17],"application":[21],"time.":[22],"However,":[23],"increasing":[24],"becoming":[27,82],"more":[28],"difficult":[29],"because":[30],"elements":[32],"that":[33,146],"drive":[34],"costs":[36,153],"are":[37],"increases":[38],"pin":[41],"count":[42],"of":[43,116],"system":[45],"on":[46],"chip":[47],"(SOC),":[48],"and":[49,89,113,133,157],"required":[50],"automated":[51],"equipment":[53],"(ATE)":[54],"channels.":[55],"While":[56],"need":[58],"for":[59,108],"has":[61],"been":[62],"growing,":[63],"a":[64,83,93,105],"reliability":[65,162],"problem":[66],"which":[68],"fault":[69],"distribution":[70],"causes":[71],"good":[72],"devices":[73],"under":[74],"(DUT)":[76],"be":[78,128],"improperly":[79],"tested":[80],"concern.":[84],"To":[85],"achieve":[86,158],"high":[87],"reliability,":[90],"we":[91,103],"propose":[92],"novel,":[94],"massively":[95],"parallel":[96],"method":[98,149],"using":[99,135,140],"multi-root.":[100],"In":[101],"addition,":[102],"develop":[104],"setup":[107],"setting":[109],"root-DUT":[111],"location":[112],"path":[115],"all":[117],"DUTs.":[118],"Using":[119],"proposed":[121,148],"wafer":[122],"method,":[124],"data":[126],"can":[127,150],"transferred":[129],"between":[130],"ATE":[132],"dies":[134],"multi-roots.":[136],"The":[137],"experimental":[138],"results":[139],"ITC":[141],"02":[142],"SOC":[143],"benchmarks":[144],"show":[145],"up":[154],"90%,":[156],"nearly":[159],"94.84%":[160],"without":[163],"affecting":[164],"yield.":[165]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2023,"cited_by_count":2},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}