{"id":"https://openalex.org/W4285104934","doi":"https://doi.org/10.1109/tpds.2022.3177291","title":"VCSR: An Efficient GPU Memory-Aware Sparse Format","display_name":"VCSR: An Efficient GPU Memory-Aware Sparse Format","publication_year":2022,"publication_date":"2022-06-03","ids":{"openalex":"https://openalex.org/W4285104934","doi":"https://doi.org/10.1109/tpds.2022.3177291"},"language":"en","primary_location":{"id":"doi:10.1109/tpds.2022.3177291","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tpds.2022.3177291","pdf_url":null,"source":{"id":"https://openalex.org/S97130795","display_name":"IEEE Transactions on Parallel and Distributed Systems","issn_l":"1045-9219","issn":["1045-9219","1558-2183","2161-9883"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Parallel and Distributed Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5058119214","display_name":"Elmira Karimi","orcid":"https://orcid.org/0000-0003-3849-4918"},"institutions":[{"id":"https://openalex.org/I12912129","display_name":"Northeastern University","ror":"https://ror.org/04t5xt781","country_code":"US","type":"education","lineage":["https://openalex.org/I12912129"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Elmira Karimi","raw_affiliation_strings":["ECE Department, Northeastern University, Boston, MA, USA"],"raw_orcid":"https://orcid.org/0000-0003-3849-4918","affiliations":[{"raw_affiliation_string":"ECE Department, Northeastern University, Boston, MA, USA","institution_ids":["https://openalex.org/I12912129"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5057498242","display_name":"N\u00edcolas Bohm Agostini","orcid":"https://orcid.org/0000-0003-1855-3810"},"institutions":[{"id":"https://openalex.org/I12912129","display_name":"Northeastern University","ror":"https://ror.org/04t5xt781","country_code":"US","type":"education","lineage":["https://openalex.org/I12912129"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nicolas Bohm Agostini","raw_affiliation_strings":["ECE Department, Northeastern University, Boston, MA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"ECE Department, Northeastern University, Boston, MA, USA","institution_ids":["https://openalex.org/I12912129"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101947049","display_name":"Shi Dong","orcid":"https://orcid.org/0000-0001-7144-7190"},"institutions":[{"id":"https://openalex.org/I12912129","display_name":"Northeastern University","ror":"https://ror.org/04t5xt781","country_code":"US","type":"education","lineage":["https://openalex.org/I12912129"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shi Dong","raw_affiliation_strings":["ECE Department, Northeastern University, Boston, MA, USA"],"raw_orcid":"https://orcid.org/0000-0001-7144-7190","affiliations":[{"raw_affiliation_string":"ECE Department, Northeastern University, Boston, MA, USA","institution_ids":["https://openalex.org/I12912129"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5061128237","display_name":"David Kaeli","orcid":"https://orcid.org/0000-0002-5692-0151"},"institutions":[{"id":"https://openalex.org/I12912129","display_name":"Northeastern University","ror":"https://ror.org/04t5xt781","country_code":"US","type":"education","lineage":["https://openalex.org/I12912129"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"David Kaeli","raw_affiliation_strings":["ECE Department, Northeastern University, Boston, MA, USA"],"raw_orcid":"https://orcid.org/0000-0002-5692-0151","affiliations":[{"raw_affiliation_string":"ECE Department, Northeastern University, Boston, MA, USA","institution_ids":["https://openalex.org/I12912129"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I12912129"],"apc_list":null,"apc_paid":null,"fwci":2.5664,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.89213403,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":99},"biblio":{"volume":"33","issue":"12","first_page":"3977","last_page":"3989"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.992900013923645,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8812277317047119},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.8100171685218811},{"id":"https://openalex.org/keywords/sparse-matrix","display_name":"Sparse matrix","score":0.6258825659751892},{"id":"https://openalex.org/keywords/kernel","display_name":"Kernel (algebra)","score":0.6246063709259033},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5768693089485168},{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.5573018789291382},{"id":"https://openalex.org/keywords/cuda","display_name":"CUDA","score":0.524082601070404},{"id":"https://openalex.org/keywords/performance-improvement","display_name":"Performance improvement","score":0.4569551944732666},{"id":"https://openalex.org/keywords/memory-bandwidth","display_name":"Memory bandwidth","score":0.45073145627975464},{"id":"https://openalex.org/keywords/supercomputer","display_name":"Supercomputer","score":0.42667990922927856},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.171127587556839},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10025551915168762}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8812277317047119},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.8100171685218811},{"id":"https://openalex.org/C56372850","wikidata":"https://www.wikidata.org/wiki/Q1050404","display_name":"Sparse matrix","level":3,"score":0.6258825659751892},{"id":"https://openalex.org/C74193536","wikidata":"https://www.wikidata.org/wiki/Q574844","display_name":"Kernel (algebra)","level":2,"score":0.6246063709259033},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5768693089485168},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.5573018789291382},{"id":"https://openalex.org/C2778119891","wikidata":"https://www.wikidata.org/wiki/Q477690","display_name":"CUDA","level":2,"score":0.524082601070404},{"id":"https://openalex.org/C2778915421","wikidata":"https://www.wikidata.org/wiki/Q3643177","display_name":"Performance improvement","level":2,"score":0.4569551944732666},{"id":"https://openalex.org/C188045654","wikidata":"https://www.wikidata.org/wiki/Q17148339","display_name":"Memory bandwidth","level":2,"score":0.45073145627975464},{"id":"https://openalex.org/C83283714","wikidata":"https://www.wikidata.org/wiki/Q121117","display_name":"Supercomputer","level":2,"score":0.42667990922927856},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.171127587556839},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10025551915168762},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C163716315","wikidata":"https://www.wikidata.org/wiki/Q901177","display_name":"Gaussian","level":2,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tpds.2022.3177291","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tpds.2022.3177291","pdf_url":null,"source":{"id":"https://openalex.org/S97130795","display_name":"IEEE Transactions on Parallel and Distributed Systems","issn_l":"1045-9219","issn":["1045-9219","1558-2183","2161-9883"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Parallel and Distributed Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":36,"referenced_works":["https://openalex.org/W1589483405","https://openalex.org/W1990832096","https://openalex.org/W1993317589","https://openalex.org/W1993704253","https://openalex.org/W1995649289","https://openalex.org/W2009654791","https://openalex.org/W2035080386","https://openalex.org/W2040556424","https://openalex.org/W2073933343","https://openalex.org/W2084446096","https://openalex.org/W2088866486","https://openalex.org/W2092013581","https://openalex.org/W2095292158","https://openalex.org/W2097479462","https://openalex.org/W2101511474","https://openalex.org/W2102528350","https://openalex.org/W2120768584","https://openalex.org/W2130289795","https://openalex.org/W2141003547","https://openalex.org/W2147542748","https://openalex.org/W2154590891","https://openalex.org/W2164904521","https://openalex.org/W2235724720","https://openalex.org/W2259574154","https://openalex.org/W2323777873","https://openalex.org/W2570841452","https://openalex.org/W2617403939","https://openalex.org/W2808128431","https://openalex.org/W2891818448","https://openalex.org/W4243261006","https://openalex.org/W4246740707","https://openalex.org/W4247828381","https://openalex.org/W6606831340","https://openalex.org/W6634983437","https://openalex.org/W6682848092","https://openalex.org/W6692224803"],"related_works":["https://openalex.org/W2052993554","https://openalex.org/W2046125858","https://openalex.org/W1541167181","https://openalex.org/W4389888442","https://openalex.org/W2149529325","https://openalex.org/W52131579","https://openalex.org/W3103168911","https://openalex.org/W2157146993","https://openalex.org/W1981252059","https://openalex.org/W4308090217"],"abstract_inverted_index":{"The":[0,281],"Sparse":[1,71],"Matrix-Vector":[2],"Multiplication":[3],"(SpMV)":[4],"kernel":[5,37,223],"is":[6,32,203,322],"used":[7],"in":[8,19,23],"a":[9,20,39,75,85,101,124,163,248,315,323],"broad":[10],"class":[11],"of":[12,92,103,127,136,145,171,270,276,300,318,347],"linear":[13],"algebra":[14],"computations.":[15],"SpMV":[16,30,222,263],"computations":[17],"result":[18],"performance":[21,26,31,44,52,113,299],"bottleneck":[22],"many":[24],"high":[25,58,125],"applications,":[27],"so":[28],"optimizing":[29],"paramount.":[33],"While":[34,309],"implementing":[35],"this":[36,64],"on":[38,84,185,226,305],"GPU":[40,47,137],"can":[41,141,181,207,313],"potentially":[42],"boost":[43],"significantly,":[45,149],"current":[46],"libraries":[48],"either":[49],"provide":[50],"modest":[51],"gains":[53],"or":[54,197],"are":[55],"burdened":[56],"with":[57,241],"sparse":[59,157,178,212,250],"format":[60,78,96,219,283,312,357],"conversion":[61,118,191,341],"overhead.":[62,119],"In":[63,159],"paper":[65],"we":[66],"introduce":[67],"the":[68,90,143,169,172,217,221,231,235,268,273,298,301,310,334,340,359],"Vertical":[69],"Compressed":[70],"Row":[72],"(VCSR)":[73],"format,":[74],"novel":[76,164],"memory-aware":[77],"that":[79,105],"out-performs":[80],"previous":[81],"proposed":[82],"formats":[83,304],"GPU.":[86],"We":[87,214,238,252,266],"first":[88],"motivate":[89],"design":[91],"our":[93,327],"baseline":[94],"VCSR":[95,120,140,161,188,218,240,271],"and":[97,112,130,180,206,234,264,336],"then":[98],"step":[99],"through":[100],"series":[102],"enhancements":[104],"further":[106],"improve":[107],"VCSR's":[108],"memory":[109,131,138,147,319],"efficiency":[110],"(VCSR-MEM)":[111],"(VCSR-INTRLV),":[114],"while":[115],"also":[116,189,253],"considering":[117],"attempts":[121],"to":[122,195,292,297,352],"produce":[123],"degree":[126],"thread-level":[128],"parallelism":[129],"utilization":[132],"by":[133,154],"exploiting":[134],"knowledge":[135],"microarchitecture.":[139],"reduce":[142],"number":[144],"global":[146],"transactions":[148],"an":[150,285,306,344],"issue":[151],"not":[152],"addressed":[153],"most":[155],"other":[156,256],"formats.":[158],"addition,":[160],"provides":[162],"reordering":[165],"mechanism.":[166],"It":[167],"minimizes":[168,190],"size":[170],"compressed":[173],"matrix,":[174],"handles":[175],"both":[176],"regular/irregular":[177],"matrices,":[179],"be":[182,208],"customized":[183],"based":[184],"matrix":[186],"size.":[187],"overhead,":[192,342],"as":[193,350],"compared":[194,296,351],"full":[196],"partial":[198],"row":[199],"reordering.":[200],"Our":[201],"methodology":[202],"highly":[204],"configurable":[205],"optimized":[209],"for":[210,220],"any":[211],"matrix.":[213],"have":[215],"evaluated":[216],"when":[224,295,338],"run":[225],"two":[227],"different":[228],"NVIDIA":[229,307],"GPUs,":[230],"Kepler":[232],"K40":[233],"Volta":[236],"V100.":[237,308],"compare":[239,254],"NVIDIA's":[242],"cuSPARSE":[243],"library":[244],"(the":[245,354],"HYB":[246],"format),":[247],"state-of-the-art":[249,257,303],"library.":[251],"against":[255],"CSR-based":[258],"formats,":[259],"including":[260,339],"CSR5,":[261],"merge-base":[262],"HOLA.":[265],"evaluate":[267],"benefits":[269],"over":[272],"entire":[274],"University":[275],"Florida's":[277],"SuiteSparse":[278],"dataset":[279],"collection.":[280],"VCSR-baseline":[282],"achieves":[284,343],"average":[286,345],"speedup":[287,346],"ranging":[288],"from":[289],"<inline-formula><tex-math":[290,293,348],"notation=\"LaTeX\">$1.10\\times$</tex-math></inline-formula>":[291],"notation=\"LaTeX\">$1.39\\times$</tex-math></inline-formula>":[294],"four":[302],"VCSR-MEM":[311],"save":[314],"significant":[316],"amount":[317],"space,":[320],"it":[321],"bit":[324],"slower":[325],"than":[326,333],"VCSR-baseline.":[328],"VCSR-INTRLV":[329],"performs":[330],"much":[331],"better":[332],"VCSR-baseline,":[335],"even":[337],"notation=\"LaTeX\">$1.08\\times$</tex-math></inline-formula>":[349],"HOLA":[353],"best":[355],"performing":[356],"among":[358],"prior":[360],"schemes).":[361]},"counts_by_year":[{"year":2026,"cited_by_count":4},{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":5},{"year":2023,"cited_by_count":2}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}