{"id":"https://openalex.org/W2778483589","doi":"https://doi.org/10.1109/tpds.2017.2785799","title":"CoreVA-MPSoC: A Many-Core Architecture with Tightly Coupled Shared and Local Data Memories","display_name":"CoreVA-MPSoC: A Many-Core Architecture with Tightly Coupled Shared and Local Data Memories","publication_year":2017,"publication_date":"2017-12-27","ids":{"openalex":"https://openalex.org/W2778483589","doi":"https://doi.org/10.1109/tpds.2017.2785799","mag":"2778483589"},"language":"en","primary_location":{"id":"doi:10.1109/tpds.2017.2785799","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tpds.2017.2785799","pdf_url":null,"source":{"id":"https://openalex.org/S97130795","display_name":"IEEE Transactions on Parallel and Distributed Systems","issn_l":"1045-9219","issn":["1045-9219","1558-2183","2161-9883"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Parallel and Distributed Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://eprints.qut.edu.au/116618/13/116618.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5083762689","display_name":"Johannes Ax","orcid":"https://orcid.org/0000-0002-4943-2715"},"institutions":[{"id":"https://openalex.org/I20121455","display_name":"Bielefeld University","ror":"https://ror.org/02hpadn98","country_code":"DE","type":"education","lineage":["https://openalex.org/I20121455"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Johannes Ax","raw_affiliation_strings":["Center of Excellence Cognitive Interaction Technology (CITEC), Cognitronics and Sensor Systems, Bielefeld University, Bielefeld, Germany"],"affiliations":[{"raw_affiliation_string":"Center of Excellence Cognitive Interaction Technology (CITEC), Cognitronics and Sensor Systems, Bielefeld University, Bielefeld, Germany","institution_ids":["https://openalex.org/I20121455"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030195449","display_name":"Gregor Sievers","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Gregor Sievers","raw_affiliation_strings":["dSPACE GmbH, Paderborn, Germany"],"affiliations":[{"raw_affiliation_string":"dSPACE GmbH, Paderborn, Germany","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035067353","display_name":"Julian Daberkow","orcid":null},"institutions":[{"id":"https://openalex.org/I20121455","display_name":"Bielefeld University","ror":"https://ror.org/02hpadn98","country_code":"DE","type":"education","lineage":["https://openalex.org/I20121455"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Julian Daberkow","raw_affiliation_strings":["Center of Excellence Cognitive Interaction Technology (CITEC), Cognitronics and Sensor Systems, Bielefeld University, Bielefeld, Germany"],"affiliations":[{"raw_affiliation_string":"Center of Excellence Cognitive Interaction Technology (CITEC), Cognitronics and Sensor Systems, Bielefeld University, Bielefeld, Germany","institution_ids":["https://openalex.org/I20121455"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049113570","display_name":"Martin Flasskamp","orcid":"https://orcid.org/0000-0003-3696-1316"},"institutions":[{"id":"https://openalex.org/I20121455","display_name":"Bielefeld University","ror":"https://ror.org/02hpadn98","country_code":"DE","type":"education","lineage":["https://openalex.org/I20121455"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Martin Flasskamp","raw_affiliation_strings":["Center of Excellence Cognitive Interaction Technology (CITEC), Cognitronics and Sensor Systems, Bielefeld University, Bielefeld, Germany"],"affiliations":[{"raw_affiliation_string":"Center of Excellence Cognitive Interaction Technology (CITEC), Cognitronics and Sensor Systems, Bielefeld University, Bielefeld, Germany","institution_ids":["https://openalex.org/I20121455"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089445182","display_name":"Marten Vohrmann","orcid":"https://orcid.org/0000-0002-1202-7265"},"institutions":[{"id":"https://openalex.org/I20121455","display_name":"Bielefeld University","ror":"https://ror.org/02hpadn98","country_code":"DE","type":"education","lineage":["https://openalex.org/I20121455"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Marten Vohrmann","raw_affiliation_strings":["Center of Excellence Cognitive Interaction Technology (CITEC), Cognitronics and Sensor Systems, Bielefeld University, Bielefeld, Germany"],"affiliations":[{"raw_affiliation_string":"Center of Excellence Cognitive Interaction Technology (CITEC), Cognitronics and Sensor Systems, Bielefeld University, Bielefeld, Germany","institution_ids":["https://openalex.org/I20121455"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016691715","display_name":"Thorsten Jungeblut","orcid":"https://orcid.org/0000-0001-7425-8766"},"institutions":[{"id":"https://openalex.org/I20121455","display_name":"Bielefeld University","ror":"https://ror.org/02hpadn98","country_code":"DE","type":"education","lineage":["https://openalex.org/I20121455"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Thorsten Jungeblut","raw_affiliation_strings":["Center of Excellence Cognitive Interaction Technology (CITEC), Cognitronics and Sensor Systems, Bielefeld University, Bielefeld, Germany"],"affiliations":[{"raw_affiliation_string":"Center of Excellence Cognitive Interaction Technology (CITEC), Cognitronics and Sensor Systems, Bielefeld University, Bielefeld, Germany","institution_ids":["https://openalex.org/I20121455"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033258629","display_name":"Wayne Kelly","orcid":"https://orcid.org/0000-0002-8554-4589"},"institutions":[{"id":"https://openalex.org/I160993911","display_name":"Queensland University of Technology","ror":"https://ror.org/03pnv4752","country_code":"AU","type":"education","lineage":["https://openalex.org/I160993911"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"Wayne Kelly","raw_affiliation_strings":["Science and Engineering Faculty, Queensland University of Technology, Brisbane, QLD, Australia"],"affiliations":[{"raw_affiliation_string":"Science and Engineering Faculty, Queensland University of Technology, Brisbane, QLD, Australia","institution_ids":["https://openalex.org/I160993911"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028498307","display_name":"Mario Porrmann","orcid":"https://orcid.org/0000-0003-1005-5753"},"institutions":[{"id":"https://openalex.org/I20121455","display_name":"Bielefeld University","ror":"https://ror.org/02hpadn98","country_code":"DE","type":"education","lineage":["https://openalex.org/I20121455"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Mario Porrmann","raw_affiliation_strings":["Center of Excellence Cognitive Interaction Technology (CITEC), Cognitronics and Sensor Systems, Bielefeld University, Bielefeld, Germany"],"affiliations":[{"raw_affiliation_string":"Center of Excellence Cognitive Interaction Technology (CITEC), Cognitronics and Sensor Systems, Bielefeld University, Bielefeld, Germany","institution_ids":["https://openalex.org/I20121455"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043372144","display_name":"Ulrich R\u00fcckert","orcid":null},"institutions":[{"id":"https://openalex.org/I20121455","display_name":"Bielefeld University","ror":"https://ror.org/02hpadn98","country_code":"DE","type":"education","lineage":["https://openalex.org/I20121455"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Ulrich Ruckert","raw_affiliation_strings":["Center of Excellence Cognitive Interaction Technology (CITEC), Cognitronics and Sensor Systems, Bielefeld University, Bielefeld, Germany"],"affiliations":[{"raw_affiliation_string":"Center of Excellence Cognitive Interaction Technology (CITEC), Cognitronics and Sensor Systems, Bielefeld University, Bielefeld, Germany","institution_ids":["https://openalex.org/I20121455"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":9,"corresponding_author_ids":["https://openalex.org/A5083762689"],"corresponding_institution_ids":["https://openalex.org/I20121455"],"apc_list":null,"apc_paid":null,"fwci":2.8504,"has_fulltext":true,"cited_by_count":30,"citation_normalized_percentile":{"value":0.92241595,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":96,"max":98},"biblio":{"volume":"29","issue":"5","first_page":"1030","last_page":"1043"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8347159624099731},{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.6790226101875305},{"id":"https://openalex.org/keywords/shared-memory","display_name":"Shared memory","score":0.653671383857727},{"id":"https://openalex.org/keywords/uniform-memory-access","display_name":"Uniform memory access","score":0.5501981377601624},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5186985731124878},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4947935938835144},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.49474093317985535},{"id":"https://openalex.org/keywords/distributed-shared-memory","display_name":"Distributed shared memory","score":0.49060574173927307},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.4877201020717621},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.44863268733024597},{"id":"https://openalex.org/keywords/distributed-memory","display_name":"Distributed memory","score":0.44627413153648376},{"id":"https://openalex.org/keywords/registered-memory","display_name":"Registered memory","score":0.4459105134010315},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.42113980650901794},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.3569839298725128},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.31088829040527344},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.282532274723053}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8347159624099731},{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.6790226101875305},{"id":"https://openalex.org/C133875982","wikidata":"https://www.wikidata.org/wiki/Q764810","display_name":"Shared memory","level":2,"score":0.653671383857727},{"id":"https://openalex.org/C51290061","wikidata":"https://www.wikidata.org/wiki/Q1936765","display_name":"Uniform memory access","level":4,"score":0.5501981377601624},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5186985731124878},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4947935938835144},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.49474093317985535},{"id":"https://openalex.org/C39528615","wikidata":"https://www.wikidata.org/wiki/Q1229610","display_name":"Distributed shared memory","level":5,"score":0.49060574173927307},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.4877201020717621},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.44863268733024597},{"id":"https://openalex.org/C91481028","wikidata":"https://www.wikidata.org/wiki/Q1054686","display_name":"Distributed memory","level":3,"score":0.44627413153648376},{"id":"https://openalex.org/C93446704","wikidata":"https://www.wikidata.org/wiki/Q449328","display_name":"Registered memory","level":3,"score":0.4459105134010315},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.42113980650901794},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.3569839298725128},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.31088829040527344},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.282532274723053}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/tpds.2017.2785799","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tpds.2017.2785799","pdf_url":null,"source":{"id":"https://openalex.org/S97130795","display_name":"IEEE Transactions on Parallel and Distributed Systems","issn_l":"1045-9219","issn":["1045-9219","1558-2183","2161-9883"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Parallel and Distributed Systems","raw_type":"journal-article"},{"id":"pmh:oai:eprints.qut.edu.au:116618","is_oa":true,"landing_page_url":null,"pdf_url":"https://eprints.qut.edu.au/116618/13/116618.pdf","source":{"id":"https://openalex.org/S4306402607","display_name":"QUT ePrints (Queensland University of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I160993911","host_organization_name":"Queensland University of Technology","host_organization_lineage":["https://openalex.org/I160993911"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Transactions on Parallel and Distributed Systems","raw_type":"Contribution to Journal"},{"id":"pmh:oai:pub.librecat.org:2915905","is_oa":true,"landing_page_url":"https://pub.uni-bielefeld.de/record/2915905","pdf_url":null,"source":{"id":"https://openalex.org/S4306401671","display_name":"PUB \u2013 Publications at Bielefeld University (Bielefeld University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I20121455","host_organization_name":"Bielefeld University","host_organization_lineage":["https://openalex.org/I20121455"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Ax J, Sievers G, Daberkow J, et al. CoreVA-MPSoC: A Many-core Architecture with Tightly Coupled Shared and Local Data Memories. <em>IEEE Transactions on Parallel and Distributed Systems</em>. 2018;29(5):1030-1043.","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":{"id":"pmh:oai:eprints.qut.edu.au:116618","is_oa":true,"landing_page_url":null,"pdf_url":"https://eprints.qut.edu.au/116618/13/116618.pdf","source":{"id":"https://openalex.org/S4306402607","display_name":"QUT ePrints (Queensland University of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I160993911","host_organization_name":"Queensland University of Technology","host_organization_lineage":["https://openalex.org/I160993911"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Transactions on Parallel and Distributed Systems","raw_type":"Contribution to Journal"},"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320323389","display_name":"Universit\u00e4t Bielefeld","ror":"https://ror.org/02hpadn98"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2778483589.pdf","grobid_xml":"https://content.openalex.org/works/W2778483589.grobid-xml"},"referenced_works_count":35,"referenced_works":["https://openalex.org/W1568192366","https://openalex.org/W1588279747","https://openalex.org/W1933280719","https://openalex.org/W1985134546","https://openalex.org/W1987512319","https://openalex.org/W1989761046","https://openalex.org/W2004481101","https://openalex.org/W2010562435","https://openalex.org/W2033139628","https://openalex.org/W2043524028","https://openalex.org/W2048331918","https://openalex.org/W2049784237","https://openalex.org/W2054613700","https://openalex.org/W2056970205","https://openalex.org/W2074044013","https://openalex.org/W2075778001","https://openalex.org/W2077976758","https://openalex.org/W2127318527","https://openalex.org/W2128221687","https://openalex.org/W2132829148","https://openalex.org/W2142465136","https://openalex.org/W2147297520","https://openalex.org/W2149590159","https://openalex.org/W2173675559","https://openalex.org/W2197428652","https://openalex.org/W2268325736","https://openalex.org/W2528553838","https://openalex.org/W2565894155","https://openalex.org/W2749961276","https://openalex.org/W3144068561","https://openalex.org/W3144433480","https://openalex.org/W3150842253","https://openalex.org/W4240046008","https://openalex.org/W6662605282","https://openalex.org/W6727683915"],"related_works":["https://openalex.org/W1959889508","https://openalex.org/W2169256459","https://openalex.org/W3180803030","https://openalex.org/W2067877207","https://openalex.org/W3167332351","https://openalex.org/W2909305807","https://openalex.org/W2350294831","https://openalex.org/W2136309889","https://openalex.org/W2011772808","https://openalex.org/W2968171375"],"abstract_inverted_index":{"MPSoCs":[0],"with":[1,63,86,116,155,165],"hierarchical":[2],"communication":[3],"infrastructures":[4],"are":[5,16,103],"promising":[6],"architectures":[7,75,85],"for":[8,105,136,183],"low":[9,64],"power":[10],"embedded":[11,28],"systems.":[12],"Multiple":[13],"CPU":[14,48,114],"clusters":[15],"coupled":[17,42],"using":[18,148],"an":[19],"Network-on-Chip":[20],"(NoC).":[21],"Our":[22],"CoreVA-MPSoC":[23],"targets":[24],"streaming":[25],"applications":[26,189],"in":[27,163],"systems,":[29],"like":[30],"signal":[31],"and":[32,60,76,95,133,145],"video":[33],"processing.":[34],"In":[35],"this":[36],"work":[37],"we":[38],"introduce":[39],"a":[40,58,96,106,166,178,184],"tightly":[41],"shared":[43,91,117,156,175],"data":[44,88,92,157],"memory":[45,74,84,89,93,118,127,151,158,176,196],"to":[46,79,124,191],"each":[47],"cluster,":[49],"which":[50],"can":[51],"be":[52],"accessed":[53],"by":[54],"all":[55],"CPUs":[56],"of":[57,72,139,174,187,194],"cluster":[59,115,144],"the":[61,70,80,125,149,172,192],"NoC":[62,146],"latency.":[65],"The":[66],"main":[67],"focus":[68],"is":[69],"comparison":[71],"different":[73,150],"their":[77],"connection":[78],"NoC.":[81],"We":[82,129],"analyze":[83],"local":[87,126,195],"only,":[90,94],"hybrid":[97],"architecture":[98,154],"integrating":[99],"both.":[100],"Implementation":[101],"results":[102,162],"presented":[104],"28":[107],"nm":[108],"FD-SOI":[109],"standard":[110],"cell":[111],"technology.":[112],"A":[113],"shows":[119,159,177],"similar":[120],"area":[121],"requirements":[122],"compared":[123,190],"architecture.":[128],"use":[130,173,193],"post":[131],"place":[132],"route":[134],"simulations":[135],"precise":[137],"analysis":[138],"energy":[140],"consumption":[141],"on":[142],"both":[143],"level":[147],"architectures.":[152],"An":[153],"best":[160],"performance":[161],"combination":[164],"high":[167],"resource":[168],"efficiency.":[169],"On":[170],"average,":[171],"17.2":[179],"percent":[180],"higher":[181],"throughput":[182],"benchmark":[185],"suite":[186],"10":[188],"only.":[197]},"counts_by_year":[{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":3},{"year":2022,"cited_by_count":6},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":5},{"year":2018,"cited_by_count":4}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}