{"id":"https://openalex.org/W2159916367","doi":"https://doi.org/10.1109/tpds.2002.1158268","title":"Integrated performance models for spmd applications and mimd architectures","display_name":"Integrated performance models for spmd applications and mimd architectures","publication_year":2002,"publication_date":"2002-12-01","ids":{"openalex":"https://openalex.org/W2159916367","doi":"https://doi.org/10.1109/tpds.2002.1158268","mag":"2159916367"},"language":"en","primary_location":{"id":"doi:10.1109/tpds.2002.1158268","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tpds.2002.1158268","pdf_url":null,"source":{"id":"https://openalex.org/S97130795","display_name":"IEEE Transactions on Parallel and Distributed Systems","issn_l":"1045-9219","issn":["1045-9219","1558-2183","2161-9883"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Parallel and Distributed Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":null,"any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5062726854","display_name":"Paolo Cremonesi","orcid":"https://orcid.org/0000-0002-1253-8081"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"P. Cremonesi","raw_affiliation_strings":["Dipartimento di Elettronica e Informazione, Politecnico di Milano, Milan, Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica e Informazione, Politecnico di Milano, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5072879702","display_name":"Claudio Gennaro","orcid":"https://orcid.org/0000-0002-3715-149X"},"institutions":[{"id":"https://openalex.org/I122991210","display_name":"Istituto di Scienza e Tecnologie dell'Informazione \"Alessandro Faedo\"","ror":"https://ror.org/05kacka20","country_code":"IT","type":"facility","lineage":["https://openalex.org/I122991210","https://openalex.org/I4210155236"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"C. Gennaro","raw_affiliation_strings":["Istituto di Elaborazione della Informazione, CNR, Pisa, Italy"],"affiliations":[{"raw_affiliation_string":"Istituto di Elaborazione della Informazione, CNR, Pisa, Italy","institution_ids":["https://openalex.org/I122991210"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5062726854"],"corresponding_institution_ids":["https://openalex.org/I93860229"],"apc_list":null,"apc_paid":null,"fwci":1.232,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.80681171,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"13","issue":"12","first_page":"1320","last_page":"1332"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/spmd","display_name":"SPMD","score":0.9551019668579102},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.903406023979187},{"id":"https://openalex.org/keywords/mimd","display_name":"MIMD","score":0.8838348388671875},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.8408802151679993},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.7014864683151245},{"id":"https://openalex.org/keywords/workstation","display_name":"Workstation","score":0.522462010383606},{"id":"https://openalex.org/keywords/parallelism","display_name":"Parallelism (grammar)","score":0.5108985304832458},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.4734622836112976},{"id":"https://openalex.org/keywords/queueing-theory","display_name":"Queueing theory","score":0.42640626430511475},{"id":"https://openalex.org/keywords/cellular-architecture","display_name":"Cellular architecture","score":0.4174572229385376},{"id":"https://openalex.org/keywords/supercomputer","display_name":"Supercomputer","score":0.4114045798778534},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.4079703688621521},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.40520185232162476},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3531913757324219},{"id":"https://openalex.org/keywords/reference-architecture","display_name":"Reference architecture","score":0.23582911491394043},{"id":"https://openalex.org/keywords/software-architecture","display_name":"Software architecture","score":0.21673905849456787},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.15067315101623535},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.14889022707939148},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.07717907428741455}],"concepts":[{"id":"https://openalex.org/C7042729","wikidata":"https://www.wikidata.org/wiki/Q2289219","display_name":"SPMD","level":2,"score":0.9551019668579102},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.903406023979187},{"id":"https://openalex.org/C21032095","wikidata":"https://www.wikidata.org/wiki/Q1149237","display_name":"MIMD","level":2,"score":0.8838348388671875},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.8408802151679993},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.7014864683151245},{"id":"https://openalex.org/C67953723","wikidata":"https://www.wikidata.org/wiki/Q192525","display_name":"Workstation","level":2,"score":0.522462010383606},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.5108985304832458},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.4734622836112976},{"id":"https://openalex.org/C22684755","wikidata":"https://www.wikidata.org/wiki/Q847526","display_name":"Queueing theory","level":2,"score":0.42640626430511475},{"id":"https://openalex.org/C37139622","wikidata":"https://www.wikidata.org/wiki/Q386953","display_name":"Cellular architecture","level":5,"score":0.4174572229385376},{"id":"https://openalex.org/C83283714","wikidata":"https://www.wikidata.org/wiki/Q121117","display_name":"Supercomputer","level":2,"score":0.4114045798778534},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4079703688621521},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.40520185232162476},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3531913757324219},{"id":"https://openalex.org/C55356503","wikidata":"https://www.wikidata.org/wiki/Q2136675","display_name":"Reference architecture","level":4,"score":0.23582911491394043},{"id":"https://openalex.org/C35869016","wikidata":"https://www.wikidata.org/wiki/Q846636","display_name":"Software architecture","level":3,"score":0.21673905849456787},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.15067315101623535},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.14889022707939148},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.07717907428741455}],"mesh":[],"locations_count":4,"locations":[{"id":"doi:10.1109/tpds.2002.1158268","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tpds.2002.1158268","pdf_url":null,"source":{"id":"https://openalex.org/S97130795","display_name":"IEEE Transactions on Parallel and Distributed Systems","issn_l":"1045-9219","issn":["1045-9219","1558-2183","2161-9883"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Parallel and Distributed Systems","raw_type":"journal-article"},{"id":"pmh:oai:dnet:people______::f63191bb2cc07465d33d359e25558ce8","is_oa":true,"landing_page_url":null,"pdf_url":null,"source":{"id":"https://openalex.org/S7407055261","display_name":"ISTI Open Portal","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Other"},{"id":"pmh:oai:re.public.polimi.it:11311/1085593","is_oa":false,"landing_page_url":"http://hdl.handle.net/11311/1085593","pdf_url":null,"source":{"id":"https://openalex.org/S4306400312","display_name":"Virtual Community of Pathological Anatomy (University of Castilla La Mancha)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I79189158","host_organization_name":"University of Castilla-La Mancha","host_organization_lineage":["https://openalex.org/I79189158"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/article"},{"id":"pmh:oai:re.public.polimi.it:11311/240452","is_oa":false,"landing_page_url":"http://hdl.handle.net/11311/240452","pdf_url":null,"source":{"id":"https://openalex.org/S4306400312","display_name":"Virtual Community of Pathological Anatomy (University of Castilla La Mancha)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I79189158","host_organization_name":"University of Castilla-La Mancha","host_organization_lineage":["https://openalex.org/I79189158"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":{"id":"pmh:oai:dnet:people______::f63191bb2cc07465d33d359e25558ce8","is_oa":true,"landing_page_url":null,"pdf_url":null,"source":{"id":"https://openalex.org/S7407055261","display_name":"ISTI Open Portal","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Other"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":57,"referenced_works":["https://openalex.org/W56945242","https://openalex.org/W97860363","https://openalex.org/W112096776","https://openalex.org/W139955016","https://openalex.org/W1538393044","https://openalex.org/W1545042256","https://openalex.org/W1554130893","https://openalex.org/W1580684925","https://openalex.org/W1592627327","https://openalex.org/W1808251450","https://openalex.org/W1828292058","https://openalex.org/W1829288025","https://openalex.org/W1976363619","https://openalex.org/W1978513924","https://openalex.org/W1979566015","https://openalex.org/W1990998971","https://openalex.org/W1992580876","https://openalex.org/W1996480057","https://openalex.org/W2002440537","https://openalex.org/W2015412318","https://openalex.org/W2018415413","https://openalex.org/W2018507204","https://openalex.org/W2027929919","https://openalex.org/W2030087881","https://openalex.org/W2036750897","https://openalex.org/W2038931470","https://openalex.org/W2043877002","https://openalex.org/W2062420912","https://openalex.org/W2064254674","https://openalex.org/W2071649025","https://openalex.org/W2082036067","https://openalex.org/W2084600167","https://openalex.org/W2106189528","https://openalex.org/W2112121929","https://openalex.org/W2112869526","https://openalex.org/W2119907964","https://openalex.org/W2124703480","https://openalex.org/W2130171170","https://openalex.org/W2133513926","https://openalex.org/W2135490589","https://openalex.org/W2136691280","https://openalex.org/W2139123992","https://openalex.org/W2142822378","https://openalex.org/W2147853062","https://openalex.org/W2150871235","https://openalex.org/W2153793343","https://openalex.org/W2175675949","https://openalex.org/W2912816024","https://openalex.org/W2987917530","https://openalex.org/W3022010365","https://openalex.org/W4240964163","https://openalex.org/W4247814152","https://openalex.org/W4252044205","https://openalex.org/W6603932361","https://openalex.org/W6604450071","https://openalex.org/W6631615826","https://openalex.org/W6632223255"],"related_works":["https://openalex.org/W2008876287","https://openalex.org/W160207554","https://openalex.org/W2386644492","https://openalex.org/W2080132406","https://openalex.org/W4254302323","https://openalex.org/W3119558187","https://openalex.org/W2114839188","https://openalex.org/W2159916367","https://openalex.org/W305009659","https://openalex.org/W1487529118"],"abstract_inverted_index":{"This":[0],"paper":[1],"introduces":[2],"queuing":[3],"network":[4],"models":[5,26,45,81,90],"for":[6],"the":[7,30,44,48,55,65,74,77,80,89,96,107],"performance":[8,97],"analysis":[9],"of":[10,23,32,38,43,50,58,67,79,99,106,112,115],"SPMD":[11],"applications":[12],"executed":[13],"on":[14,29,73],"general-purpose":[15],"parallel":[16,40,101],"architectures":[17],"such":[18],"as":[19,103],"MIMD":[20],"and":[21,35,60,63,70,86],"clusters":[22],"workstations.":[24],"The":[25],"are":[27],"based":[28],"pattern":[31],"computation,":[33],"communication,":[34],"I/O":[36,61,117],"operations":[37],"typical":[39],"applications.":[41],"Analysis":[42],"leads":[46],"to":[47,83,94],"definition":[49],"speedup":[51],"surfaces":[52],"which":[53],"capture":[54],"relative":[56],"influence":[57],"processors":[59],"parallelism":[62],"show":[64],"effects":[66],"different":[68],"hardware":[69,87],"software":[71],"components":[72],"performance.":[75],"Since":[76],"parameters":[78],"correspond":[82],"measurable":[84],"program":[85],"characteristics,":[88],"can":[91],"be":[92],"used":[93],"anticipate":[95],"behavior":[98],"a":[100,104],"application":[102],"function":[105],"target":[108],"architecture":[109],"(i.e.,":[110],"number":[111,114],"processors,":[113],"disks,":[116],"topology,":[118],"etc).":[119]},"counts_by_year":[{"year":2016,"cited_by_count":1}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}