{"id":"https://openalex.org/W2210325884","doi":"https://doi.org/10.1109/tmscs.2015.2498549","title":"Hybrid Main Memory for High Bandwidth Multi-Core System","display_name":"Hybrid Main Memory for High Bandwidth Multi-Core System","publication_year":2015,"publication_date":"2015-07-01","ids":{"openalex":"https://openalex.org/W2210325884","doi":"https://doi.org/10.1109/tmscs.2015.2498549","mag":"2210325884"},"language":"en","primary_location":{"id":"doi:10.1109/tmscs.2015.2498549","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tmscs.2015.2498549","pdf_url":null,"source":{"id":"https://openalex.org/S4210201583","display_name":"IEEE Transactions on Multi-Scale Computing Systems","issn_l":"2332-7766","issn":["2332-7766","2372-207X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Multi-Scale Computing Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5055644098","display_name":"Dongki Kim","orcid":"https://orcid.org/0000-0001-5277-9632"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Dongki Kim","raw_affiliation_strings":["Pohang University of Science and Technology, Pohang, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Pohang University of Science and Technology, Pohang, Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063521444","display_name":"Sungjoo Yoo","orcid":"https://orcid.org/0000-0002-5853-0675"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sungjoo Yoo","raw_affiliation_strings":["Seoul National University, Seoul, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Seoul National University, Seoul, Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5048785540","display_name":"Sunggu Lee","orcid":"https://orcid.org/0000-0003-3858-0779"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sunggu Lee","raw_affiliation_strings":["Pohang University of Science and Technology, Pohang, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Pohang University of Science and Technology, Pohang, Korea","institution_ids":["https://openalex.org/I123900574"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.9354,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.86269637,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"1","issue":"3","first_page":"138","last_page":"149"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10101","display_name":"Cloud Computing and Resource Management","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8565915822982788},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.7172384262084961},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.6731370687484741},{"id":"https://openalex.org/keywords/registered-memory","display_name":"Registered memory","score":0.6106811165809631},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.5860463380813599},{"id":"https://openalex.org/keywords/cas-latency","display_name":"CAS latency","score":0.5799480676651001},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.5698778629302979},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5265800356864929},{"id":"https://openalex.org/keywords/uniform-memory-access","display_name":"Uniform memory access","score":0.49790334701538086},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.45813679695129395},{"id":"https://openalex.org/keywords/non-uniform-memory-access","display_name":"Non-uniform memory access","score":0.45066699385643005},{"id":"https://openalex.org/keywords/memory-bandwidth","display_name":"Memory bandwidth","score":0.419938325881958},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3684443235397339},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.3410782217979431},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.2623445391654968},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.24275201559066772},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.2229536473751068}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8565915822982788},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.7172384262084961},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.6731370687484741},{"id":"https://openalex.org/C93446704","wikidata":"https://www.wikidata.org/wiki/Q449328","display_name":"Registered memory","level":3,"score":0.6106811165809631},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.5860463380813599},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.5799480676651001},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.5698778629302979},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5265800356864929},{"id":"https://openalex.org/C51290061","wikidata":"https://www.wikidata.org/wiki/Q1936765","display_name":"Uniform memory access","level":4,"score":0.49790334701538086},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.45813679695129395},{"id":"https://openalex.org/C133371097","wikidata":"https://www.wikidata.org/wiki/Q868014","display_name":"Non-uniform memory access","level":5,"score":0.45066699385643005},{"id":"https://openalex.org/C188045654","wikidata":"https://www.wikidata.org/wiki/Q17148339","display_name":"Memory bandwidth","level":2,"score":0.419938325881958},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3684443235397339},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.3410782217979431},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.2623445391654968},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.24275201559066772},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.2229536473751068}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tmscs.2015.2498549","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tmscs.2015.2498549","pdf_url":null,"source":{"id":"https://openalex.org/S4210201583","display_name":"IEEE Transactions on Multi-Scale Computing Systems","issn_l":"2332-7766","issn":["2332-7766","2372-207X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Multi-Scale Computing Systems","raw_type":"journal-article"},{"id":"pmh:oai:oasis.postech.ac.kr:2014.oak/36288","is_oa":false,"landing_page_url":"https://oasis.postech.ac.kr/handle/2014.oak/36288","pdf_url":null,"source":{"id":"https://openalex.org/S4306401965","display_name":"Open Access System for Information Sharing (Pohang University of Science and Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I123900574","host_organization_name":"Pohang University of Science and Technology","host_organization_lineage":["https://openalex.org/I123900574"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.9100000262260437,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G8808156539","display_name":null,"funder_award_id":"10041608","funder_id":"https://openalex.org/F4320334879","funder_display_name":"Korea Evaluation Institute of Industrial Technology"}],"funders":[{"id":"https://openalex.org/F4320321292","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542"},{"id":"https://openalex.org/F4320334879","display_name":"Korea Evaluation Institute of Industrial Technology","ror":"https://ror.org/03z9cwa38"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":50,"referenced_works":["https://openalex.org/W1031574087","https://openalex.org/W1639210325","https://openalex.org/W1973735988","https://openalex.org/W1975698617","https://openalex.org/W1980035523","https://openalex.org/W1983826793","https://openalex.org/W1985263063","https://openalex.org/W1987201308","https://openalex.org/W2005203204","https://openalex.org/W2010540152","https://openalex.org/W2024499203","https://openalex.org/W2032818550","https://openalex.org/W2041588416","https://openalex.org/W2047427636","https://openalex.org/W2048588974","https://openalex.org/W2051216594","https://openalex.org/W2055818721","https://openalex.org/W2076217257","https://openalex.org/W2077940408","https://openalex.org/W2082070657","https://openalex.org/W2082982763","https://openalex.org/W2085830671","https://openalex.org/W2101810455","https://openalex.org/W2103397328","https://openalex.org/W2112753327","https://openalex.org/W2112768159","https://openalex.org/W2115500527","https://openalex.org/W2119473230","https://openalex.org/W2120829734","https://openalex.org/W2130657217","https://openalex.org/W2147341731","https://openalex.org/W2148797773","https://openalex.org/W2150245818","https://openalex.org/W2153378664","https://openalex.org/W2155462575","https://openalex.org/W2155694951","https://openalex.org/W2162838417","https://openalex.org/W2169865228","https://openalex.org/W2170666978","https://openalex.org/W2293682522","https://openalex.org/W3138617740","https://openalex.org/W4231823180","https://openalex.org/W4236382111","https://openalex.org/W6643655087","https://openalex.org/W6658639229","https://openalex.org/W6663190830","https://openalex.org/W6671183045","https://openalex.org/W6684763460","https://openalex.org/W6817964639","https://openalex.org/W7056040472"],"related_works":["https://openalex.org/W4285245242","https://openalex.org/W3108993429","https://openalex.org/W2181858947","https://openalex.org/W2782503170","https://openalex.org/W2041174925","https://openalex.org/W1982632559","https://openalex.org/W2148966412","https://openalex.org/W4233816696","https://openalex.org/W1979830285","https://openalex.org/W2210325884"],"abstract_inverted_index":{"In":[0,91,137],"the":[1,49,58,74,79,116,127,131,189,192],"hybrid":[2,83,121],"main":[3,30,84],"memory":[4,31,59,80,85,111,122,135,157],"sub-system":[5,123],"which":[6,199],"consists":[7,200],"of":[8,25,40,55,61,82,88,120,134,174,191,201],"DRAM":[9,15,26,44,53,75,89,101],"and":[10,28,45,102,118,160,181,204],"phase":[11],"change":[12],"RAM":[13],"(PRAM),":[14],"is":[16,63,124],"often":[17],"used":[18],"as":[19],"a":[20,23,96,149,196],"cache.":[21,90],"Such":[22],"configuration":[24],"cache":[27,76],"PRAM":[29,46,62,103],"has":[32],"two":[33],"problems.":[34],"First,":[35],"it":[36,68],"requires":[37],"high":[38],"bandwidth":[39,60,81],"data":[41,132,146],"movement":[42],"between":[43],"due":[47],"to":[48,86,139,151],"large":[50],"granularity":[51],"(i.e.,":[52],"row)":[54],"caching.":[56],"Second,":[57],"not":[64],"fully":[65],"utilized":[66],"since":[67],"can":[69,104],"be":[70,105],"accessed":[71,106],"only":[72],"by":[73,126],"thereby":[77,155],"limiting":[78],"that":[87,115],"this":[92,141],"paper,":[93],"we":[94,143],"propose":[95,144],"novel":[97],"architecture":[98],"where":[99],"both":[100],"in":[107,148,169,195],"parallel":[108],"for":[109],"higher":[110],"performance.":[112],"We":[113],"analyze":[114],"performance":[117,170],"fairness":[119,177],"limited":[125],"stall":[128,153],"time":[129,154],"at":[130],"queue":[133],"controller.":[136],"order":[138],"resolve":[140],"problem,":[142],"caching":[145],"selectively":[147],"way":[150],"reduce":[152],"reducing":[156],"access":[158],"latency":[159],"improving":[161],"fairness.":[162],"Our":[163],"experimental":[164],"results":[165],"show":[166],"significant":[167],"improvements":[168],"(by":[171,178,184],"an":[172],"average":[173],"21":[175],"percent),":[176],"2.1":[179],"times),":[180],"energy":[182],"consumption":[183],"10":[185],"percent)":[186],"compared":[187],"with":[188],"best":[190],"existing":[193],"methods":[194],"multi-core":[197],"system":[198],"multiple":[202],"CPUs":[203],"GPU.":[205]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
