{"id":"https://openalex.org/W2139475822","doi":"https://doi.org/10.1109/tim.2010.2051062","title":"Blind Adaptive Estimation of Integral Nonlinear Errors in ADCs Using Arbitrary Input Stimulus","display_name":"Blind Adaptive Estimation of Integral Nonlinear Errors in ADCs Using Arbitrary Input Stimulus","publication_year":2010,"publication_date":"2010-07-01","ids":{"openalex":"https://openalex.org/W2139475822","doi":"https://doi.org/10.1109/tim.2010.2051062","mag":"2139475822"},"language":"en","primary_location":{"id":"doi:10.1109/tim.2010.2051062","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tim.2010.2051062","pdf_url":null,"source":{"id":"https://openalex.org/S10892749","display_name":"IEEE Transactions on Instrumentation and Measurement","issn_l":"0018-9456","issn":["0018-9456","1557-9662"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Instrumentation and Measurement","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072282417","display_name":"Antonio Gin\u00e9s","orcid":"https://orcid.org/0000-0001-5272-5802"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"Antonio J. Gines Arteaga","raw_affiliation_strings":["Instituto de Microelectrónica de Sevilla (IMSE-CNM-CSIC), Seville, Spain"],"affiliations":[{"raw_affiliation_string":"Instituto de Microelectrónica de Sevilla (IMSE-CNM-CSIC), Seville, Spain","institution_ids":["https://openalex.org/I4210104545"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091600572","display_name":"E. Peral\u00edas","orcid":"https://orcid.org/0000-0003-0629-0785"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Eduardo J. Peralias","raw_affiliation_strings":["Instituto de Microelectrónica de Sevilla (IMSE-CNM-CSIC), Seville, Spain"],"affiliations":[{"raw_affiliation_string":"Instituto de Microelectrónica de Sevilla (IMSE-CNM-CSIC), Seville, Spain","institution_ids":["https://openalex.org/I4210104545"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5066990447","display_name":"A. Rueda","orcid":"https://orcid.org/0000-0003-4564-9359"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Adoraci\u00f3n Rueda","raw_affiliation_strings":["Instituto de Microelectrónica de Sevilla (IMSE-CNM-CSIC), Seville, Spain"],"affiliations":[{"raw_affiliation_string":"Instituto de Microelectrónica de Sevilla (IMSE-CNM-CSIC), Seville, Spain","institution_ids":["https://openalex.org/I4210104545"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5072282417"],"corresponding_institution_ids":["https://openalex.org/I4210104545"],"apc_list":null,"apc_paid":null,"fwci":0.649,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.73003312,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"60","issue":"2","first_page":"452","last_page":"461"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/integral-nonlinearity","display_name":"Integral nonlinearity","score":0.7527170777320862},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.5890375971794128},{"id":"https://openalex.org/keywords/nonlinear-system","display_name":"Nonlinear system","score":0.5444477796554565},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5346969962120056},{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.5326017737388611},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5217866897583008},{"id":"https://openalex.org/keywords/differential-nonlinearity","display_name":"Differential nonlinearity","score":0.4921354651451111},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4225751459598541},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.331249475479126},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.17701071500778198},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.10223087668418884},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.10137194395065308}],"concepts":[{"id":"https://openalex.org/C130829357","wikidata":"https://www.wikidata.org/wiki/Q1665386","display_name":"Integral nonlinearity","level":4,"score":0.7527170777320862},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.5890375971794128},{"id":"https://openalex.org/C158622935","wikidata":"https://www.wikidata.org/wiki/Q660848","display_name":"Nonlinear system","level":2,"score":0.5444477796554565},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5346969962120056},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.5326017737388611},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5217866897583008},{"id":"https://openalex.org/C71217194","wikidata":"https://www.wikidata.org/wiki/Q575958","display_name":"Differential nonlinearity","level":3,"score":0.4921354651451111},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4225751459598541},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.331249475479126},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.17701071500778198},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.10223087668418884},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.10137194395065308},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tim.2010.2051062","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tim.2010.2051062","pdf_url":null,"source":{"id":"https://openalex.org/S10892749","display_name":"IEEE Transactions on Instrumentation and Measurement","issn_l":"0018-9456","issn":["0018-9456","1557-9662"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Instrumentation and Measurement","raw_type":"journal-article"},{"id":"pmh:oai:digital.csic.es:10261/83216","is_oa":false,"landing_page_url":"http://hdl.handle.net/10261/83216","pdf_url":null,"source":{"id":"https://openalex.org/S4306400616","display_name":"DIGITAL.CSIC (Spanish National Research Council (CSIC))","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I134820265","host_organization_name":"Consejo Superior de Investigaciones Cient\u00edficas","host_organization_lineage":["https://openalex.org/I134820265"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"art\u00edculo"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W569179405","https://openalex.org/W1910810368","https://openalex.org/W2021095575","https://openalex.org/W2042395189","https://openalex.org/W2063724383","https://openalex.org/W2069067360","https://openalex.org/W2109570325","https://openalex.org/W2111642149","https://openalex.org/W2128413723","https://openalex.org/W2130531486","https://openalex.org/W2131477866","https://openalex.org/W2134179788","https://openalex.org/W2137235494","https://openalex.org/W2137740093","https://openalex.org/W2145197148","https://openalex.org/W2170438773","https://openalex.org/W2187548090","https://openalex.org/W2537264164","https://openalex.org/W4240790906"],"related_works":["https://openalex.org/W3144720315","https://openalex.org/W2364492267","https://openalex.org/W2543218666","https://openalex.org/W2092629642","https://openalex.org/W2370818752","https://openalex.org/W2160322785","https://openalex.org/W2117274934","https://openalex.org/W2168668096","https://openalex.org/W4362659935","https://openalex.org/W4313404057"],"abstract_inverted_index":{"An":[0],"adaptive":[1],"digital":[2,61,70],"test":[3,36,42,72,77,85,99],"procedure":[4],"for":[5,83,116,122],"the":[6,28,33,51,123],"static":[7,76],"characterization":[8],"of":[9,27,32,97],"analog-to-digital":[10],"converters":[11],"(ADCs)":[12],"is":[13],"described":[14],"in":[15,88],"this":[16,65],"paper.":[17],"The":[18,95],"proposed":[19],"technique":[20],"performs":[21],"a":[22,57,117],"blind":[23],"and":[24,55,78,111,121],"accurate":[25],"estimation":[26],"integral":[29],"nonlinearity":[30],"(INL)":[31],"ADC":[34,75,120],"under":[35],"(ADCUT)":[37],"without":[38],"requiring":[39],"any":[40],"particular":[41],"stimulus.":[43],"Its":[44],"practical":[45],"implementation":[46],"implies":[47],"no":[48],"modifications":[49],"on":[50],"ADCUT":[52],"analog":[53],"section":[54],"needs":[56],"very":[58],"simple":[59,69],"low-cost":[60],"logic,":[62],"which":[63],"makes":[64],"useful":[66],"for:":[67],"1)":[68],"automatic":[71],"equipment":[73],"(ATE)-based":[74],"2)":[79],"built-in":[80],"self-test":[81],"(BIST)":[82],"ADCs":[84],"working":[86],"either":[87],"concurrent":[89],"(online)":[90],"or":[91],"nonconcurrent":[92],"(offline)":[93],"modes.":[94],"validation":[96],"these":[98],"methods":[100],"has":[101],"been":[102],"performed":[103],"through":[104],"realistic":[105],"behavioral":[106],"simulations":[107],"including":[108],"noise,":[109],"mismatch,":[110],"nonlinear":[112],"errors.":[113],"Experimental":[114],"results":[115],"custom-designed":[118],"pipeline":[119],"commercial":[124],"AD664":[125],"chip":[126],"are":[127],"also":[128],"reported.":[129]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":3},{"year":2014,"cited_by_count":5},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-03-12T08:34:05.389933","created_date":"2025-10-10T00:00:00"}