{"id":"https://openalex.org/W4320713238","doi":"https://doi.org/10.1109/tie.2023.3243284","title":"Model Predictive Control With Reduced Common-Mode Voltage Based on Optimal Switching Sequences for Nested Neutral Point Clamped Inverter","display_name":"Model Predictive Control With Reduced Common-Mode Voltage Based on Optimal Switching Sequences for Nested Neutral Point Clamped Inverter","publication_year":2023,"publication_date":"2023-02-14","ids":{"openalex":"https://openalex.org/W4320713238","doi":"https://doi.org/10.1109/tie.2023.3243284"},"language":"en","primary_location":{"id":"doi:10.1109/tie.2023.3243284","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tie.2023.3243284","pdf_url":null,"source":{"id":"https://openalex.org/S58031724","display_name":"IEEE Transactions on Industrial Electronics","issn_l":"0278-0046","issn":["0278-0046","1557-9948"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Industrial Electronics","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5070662336","display_name":"Kourosh Khalaj Monfared","orcid":"https://orcid.org/0000-0002-9863-871X"},"institutions":[{"id":"https://openalex.org/I23946033","display_name":"University of Tehran","ror":"https://ror.org/05vf56z40","country_code":"IR","type":"education","lineage":["https://openalex.org/I23946033"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Kourosh Khalaj Monfared","raw_affiliation_strings":["School of Electrical and Computer Engineering, College of Engineering, University of Tehran, Tehran, Iran"],"raw_orcid":"https://orcid.org/0000-0002-9863-871X","affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, College of Engineering, University of Tehran, Tehran, Iran","institution_ids":["https://openalex.org/I23946033"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076124766","display_name":"Hossein Iman\u2010Eini","orcid":"https://orcid.org/0000-0003-1118-2877"},"institutions":[{"id":"https://openalex.org/I23946033","display_name":"University of Tehran","ror":"https://ror.org/05vf56z40","country_code":"IR","type":"education","lineage":["https://openalex.org/I23946033"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Hossein Iman-Eini","raw_affiliation_strings":["School of Electrical and Computer Engineering, College of Engineering, University of Tehran, Tehran, Iran"],"raw_orcid":"https://orcid.org/0000-0003-1118-2877","affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, College of Engineering, University of Tehran, Tehran, Iran","institution_ids":["https://openalex.org/I23946033"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064348112","display_name":"Yousef Neyshabouri","orcid":"https://orcid.org/0000-0002-8102-6688"},"institutions":[{"id":"https://openalex.org/I38476204","display_name":"Urmia University","ror":"https://ror.org/032fk0x53","country_code":"IR","type":"education","lineage":["https://openalex.org/I38476204"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Yousef Neyshabouri","raw_affiliation_strings":["Faculty of Electrical and Computer Engineering, Urmia University, Urmia, Iran"],"raw_orcid":"https://orcid.org/0000-0002-8102-6688","affiliations":[{"raw_affiliation_string":"Faculty of Electrical and Computer Engineering, Urmia University, Urmia, Iran","institution_ids":["https://openalex.org/I38476204"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5053880143","display_name":"Marco Liserre","orcid":"https://orcid.org/0000-0002-0818-2684"},"institutions":[{"id":"https://openalex.org/I32021983","display_name":"Christian-Albrechts-Universit\u00e4t zu Kiel","ror":"https://ror.org/04v76ef78","country_code":"DE","type":"education","lineage":["https://openalex.org/I32021983"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Marco Liserre","raw_affiliation_strings":["Chair of Power Electronics, Kiel University, Kiel, Germany"],"raw_orcid":"https://orcid.org/0000-0002-0818-2684","affiliations":[{"raw_affiliation_string":"Chair of Power Electronics, Kiel University, Kiel, Germany","institution_ids":["https://openalex.org/I32021983"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":4.0496,"has_fulltext":false,"cited_by_count":33,"citation_normalized_percentile":{"value":0.94434558,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":98,"max":99},"biblio":{"volume":"71","issue":"1","first_page":"27","last_page":"38"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10228","display_name":"Multilevel Inverters and Converters","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10228","display_name":"Multilevel Inverters and Converters","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10175","display_name":"Advanced DC-DC Converters","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10361","display_name":"Silicon Carbide Semiconductor Technologies","score":0.9937999844551086,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.6626220941543579},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.6251386404037476},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.613422691822052},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.592479407787323},{"id":"https://openalex.org/keywords/matlab","display_name":"MATLAB","score":0.5777906179428101},{"id":"https://openalex.org/keywords/model-predictive-control","display_name":"Model predictive control","score":0.5441085696220398},{"id":"https://openalex.org/keywords/operating-point","display_name":"Operating point","score":0.5272274017333984},{"id":"https://openalex.org/keywords/common-mode-signal","display_name":"Common-mode signal","score":0.4961867928504944},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.45281144976615906},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.43628451228141785},{"id":"https://openalex.org/keywords/digital-signal-processor","display_name":"Digital signal processor","score":0.422676146030426},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.39445197582244873},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3699301481246948},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.34633854031562805},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.31554603576660156},{"id":"https://openalex.org/keywords/control","display_name":"Control (management)","score":0.2378559112548828},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.18053841590881348},{"id":"https://openalex.org/keywords/analog-signal","display_name":"Analog signal","score":0.10074344277381897}],"concepts":[{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.6626220941543579},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.6251386404037476},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.613422691822052},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.592479407787323},{"id":"https://openalex.org/C2780365114","wikidata":"https://www.wikidata.org/wiki/Q169478","display_name":"MATLAB","level":2,"score":0.5777906179428101},{"id":"https://openalex.org/C172205157","wikidata":"https://www.wikidata.org/wiki/Q1782962","display_name":"Model predictive control","level":3,"score":0.5441085696220398},{"id":"https://openalex.org/C22762622","wikidata":"https://www.wikidata.org/wiki/Q628904","display_name":"Operating point","level":2,"score":0.5272274017333984},{"id":"https://openalex.org/C189714311","wikidata":"https://www.wikidata.org/wiki/Q1530371","display_name":"Common-mode signal","level":4,"score":0.4961867928504944},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.45281144976615906},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.43628451228141785},{"id":"https://openalex.org/C161611012","wikidata":"https://www.wikidata.org/wiki/Q106370","display_name":"Digital signal processor","level":3,"score":0.422676146030426},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.39445197582244873},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3699301481246948},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.34633854031562805},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.31554603576660156},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.2378559112548828},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.18053841590881348},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.10074344277381897},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tie.2023.3243284","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tie.2023.3243284","pdf_url":null,"source":{"id":"https://openalex.org/S58031724","display_name":"IEEE Transactions on Industrial Electronics","issn_l":"0278-0046","issn":["0278-0046","1557-9948"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Industrial Electronics","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G815100399","display_name":null,"funder_award_id":"4001386","funder_id":"https://openalex.org/F4320322243","funder_display_name":"Iran National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320322243","display_name":"Iran National Science Foundation","ror":"https://ror.org/03sr1ma14"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W1592775089","https://openalex.org/W2055725467","https://openalex.org/W2114551883","https://openalex.org/W2151172087","https://openalex.org/W2399640368","https://openalex.org/W2462710070","https://openalex.org/W2476695142","https://openalex.org/W2548618581","https://openalex.org/W2607909136","https://openalex.org/W2752289245","https://openalex.org/W2789786468","https://openalex.org/W2790546843","https://openalex.org/W2906817066","https://openalex.org/W2974306065","https://openalex.org/W3044237287","https://openalex.org/W3046085619","https://openalex.org/W3128540215","https://openalex.org/W3140137846","https://openalex.org/W3148152556","https://openalex.org/W3164659066","https://openalex.org/W3191258688","https://openalex.org/W3191603555","https://openalex.org/W3207137419","https://openalex.org/W4205095735","https://openalex.org/W4210429166","https://openalex.org/W4229451212"],"related_works":["https://openalex.org/W2319687164","https://openalex.org/W1556297113","https://openalex.org/W2572037897","https://openalex.org/W2077289773","https://openalex.org/W2352569066","https://openalex.org/W4239668215","https://openalex.org/W2379636925","https://openalex.org/W3046508871","https://openalex.org/W2390600871","https://openalex.org/W1927072911"],"abstract_inverted_index":{"This":[0],"article":[1],"proposes":[2],"a":[3,21,53,114,162],"new":[4],"model":[5],"predictive":[6],"control":[7,129],"strategy":[8],"with":[9],"reduced":[10],"common-mode":[11],"voltage":[12,39,106],"(CMV)":[13],"based":[14,160],"on":[15,122,161],"optimal":[16],"switching":[17,56,62],"sequences":[18,63],"(OSS-MPC)":[19],"for":[20],"three-phase":[22],"(3PH)":[23],"four-level":[24],"nested":[25],"neutral":[26],"point":[27],"clamped":[28],"(4L-NNPC)":[29],"inverter.":[30],"The":[31,144,154],"proposed":[32,120,148],"method":[33,121,149],"controls":[34],"load":[35],"current,":[36],"mitigates":[37],"the":[38,46,61,69,84,87,95,105,119,123,127,136,141,147,167],"fluctuations":[40,107],"of":[41,89,108,146],"flying":[42],"capacitors":[43],"(FCs)":[44],"in":[45,83,94,100,152],"entire":[47,96],"operating":[48,97,102],"frequency":[49],"range,":[50],"and":[51,139],"provides":[52],"constant":[54],"inverter":[55],"frequency.":[57],"In":[58],"this":[59],"work,":[60],"(SSs)":[64],"are":[65,110,157],"configured":[66],"so":[67],"that":[68],"peak":[70],"CMV":[71],"is":[72,92,131,150],"limited":[73],"to":[74,134],"<inline-formula":[75],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[76],"xmlns:xlink=\"http://www.w3.org/1999/xlink\"><tex-math":[77],"notation=\"LaTeX\">$V_{dc}/6$</tex-math></inline-formula>":[78],".":[79],"By":[80],"involving":[81],"time":[82],"optimization":[85],"process,":[86],"balance":[88],"FCs":[90,109],"voltages":[91],"realized":[93],"frequency,":[98],"especially":[99],"low-frequency":[101],"mode.":[103],"Also,":[104],"further":[111],"mitigated":[112],"through":[113],"mathematical-logic":[115],"technique.":[116],"To":[117],"implement":[118],"digital":[124],"signal":[125],"processor,":[126],"deadbeat":[128],"technique":[130],"also":[132],"used":[133],"reduce":[135],"search":[137],"space,":[138],"thus,":[140],"computation":[142],"burden.":[143],"performance":[145],"verified":[151],"MATLAB/SIMULINK.":[153],"experimental":[155],"results":[156],"carried":[158],"out":[159],"scaled-down":[163],"hardware":[164],"prototype":[165],"validating":[166],"theoretical":[168],"claims.":[169]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":12},{"year":2024,"cited_by_count":13},{"year":2023,"cited_by_count":6}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}