{"id":"https://openalex.org/W4312734682","doi":"https://doi.org/10.1109/tetc.2022.3228575","title":"TopSort: A High-Performance Two-Phase Sorting Accelerator Optimized on HBM-Based FPGAs","display_name":"TopSort: A High-Performance Two-Phase Sorting Accelerator Optimized on HBM-Based FPGAs","publication_year":2022,"publication_date":"2022-12-19","ids":{"openalex":"https://openalex.org/W4312734682","doi":"https://doi.org/10.1109/tetc.2022.3228575"},"language":"en","primary_location":{"id":"doi:10.1109/tetc.2022.3228575","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tetc.2022.3228575","pdf_url":null,"source":{"id":"https://openalex.org/S2496326734","display_name":"IEEE Transactions on Emerging Topics in Computing","issn_l":"2168-6750","issn":["2168-6750","2376-4562"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Emerging Topics in Computing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5003981003","display_name":"Weikang Qiao","orcid":"https://orcid.org/0000-0003-1946-2021"},"institutions":[{"id":"https://openalex.org/I161318765","display_name":"University of California, Los Angeles","ror":"https://ror.org/046rm7j60","country_code":"US","type":"education","lineage":["https://openalex.org/I161318765"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Weikang Qiao","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of California, Los Angeles, CA, USA"],"raw_orcid":"https://orcid.org/0000-0003-1946-2021","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of California, Los Angeles, CA, USA","institution_ids":["https://openalex.org/I161318765"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032647120","display_name":"Licheng Guo","orcid":"https://orcid.org/0000-0002-0705-9510"},"institutions":[{"id":"https://openalex.org/I161318765","display_name":"University of California, Los Angeles","ror":"https://ror.org/046rm7j60","country_code":"US","type":"education","lineage":["https://openalex.org/I161318765"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Licheng Guo","raw_affiliation_strings":["Department of Computer Science, University of California, Los Angeles, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, University of California, Los Angeles, CA, USA","institution_ids":["https://openalex.org/I161318765"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065889904","display_name":"Zhenman Fang","orcid":"https://orcid.org/0000-0003-0603-9697"},"institutions":[{"id":"https://openalex.org/I18014758","display_name":"Simon Fraser University","ror":"https://ror.org/0213rcc28","country_code":"CA","type":"education","lineage":["https://openalex.org/I18014758"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Zhenman Fang","raw_affiliation_strings":["School of Engineering Science, Simon Fraser University, Burnaby, BC, Canada"],"raw_orcid":"https://orcid.org/0000-0003-0603-9697","affiliations":[{"raw_affiliation_string":"School of Engineering Science, Simon Fraser University, Burnaby, BC, Canada","institution_ids":["https://openalex.org/I18014758"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051454330","display_name":"Mau-Chung Frank Chang","orcid":"https://orcid.org/0000-0002-2934-9359"},"institutions":[{"id":"https://openalex.org/I161318765","display_name":"University of California, Los Angeles","ror":"https://ror.org/046rm7j60","country_code":"US","type":"education","lineage":["https://openalex.org/I161318765"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mau-Chung Frank Chang","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of California, Los Angeles, CA, USA"],"raw_orcid":"https://orcid.org/0000-0002-2934-9359","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of California, Los Angeles, CA, USA","institution_ids":["https://openalex.org/I161318765"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016776689","display_name":"Jason Cong","orcid":"https://orcid.org/0000-0003-2887-6963"},"institutions":[{"id":"https://openalex.org/I161318765","display_name":"University of California, Los Angeles","ror":"https://ror.org/046rm7j60","country_code":"US","type":"education","lineage":["https://openalex.org/I161318765"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jason Cong","raw_affiliation_strings":["Department of Computer Science, University of California, Los Angeles, CA, USA"],"raw_orcid":"https://orcid.org/0000-0003-2887-6963","affiliations":[{"raw_affiliation_string":"Department of Computer Science, University of California, Los Angeles, CA, USA","institution_ids":["https://openalex.org/I161318765"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.2837,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.81517112,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":99},"biblio":{"volume":"11","issue":"2","first_page":"404","last_page":"419"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8183095455169678},{"id":"https://openalex.org/keywords/merge-sort","display_name":"Merge sort","score":0.7263251543045044},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.670242428779602},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.6325089335441589},{"id":"https://openalex.org/keywords/merge","display_name":"Merge (version control)","score":0.5569055676460266},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.45779022574424744},{"id":"https://openalex.org/keywords/sort","display_name":"sort","score":0.4167417287826538},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.39145389199256897},{"id":"https://openalex.org/keywords/sorting","display_name":"Sorting","score":0.35982799530029297},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3513728082180023},{"id":"https://openalex.org/keywords/sorting-algorithm","display_name":"Sorting algorithm","score":0.29300999641418457},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.19286367297172546},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.12784844636917114},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08465078473091125}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8183095455169678},{"id":"https://openalex.org/C35555965","wikidata":"https://www.wikidata.org/wiki/Q189057","display_name":"Merge sort","level":4,"score":0.7263251543045044},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.670242428779602},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.6325089335441589},{"id":"https://openalex.org/C197129107","wikidata":"https://www.wikidata.org/wiki/Q1921621","display_name":"Merge (version control)","level":2,"score":0.5569055676460266},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.45779022574424744},{"id":"https://openalex.org/C88548561","wikidata":"https://www.wikidata.org/wiki/Q347599","display_name":"sort","level":2,"score":0.4167417287826538},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.39145389199256897},{"id":"https://openalex.org/C111696304","wikidata":"https://www.wikidata.org/wiki/Q2303697","display_name":"Sorting","level":2,"score":0.35982799530029297},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3513728082180023},{"id":"https://openalex.org/C108094655","wikidata":"https://www.wikidata.org/wiki/Q181593","display_name":"Sorting algorithm","level":3,"score":0.29300999641418457},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.19286367297172546},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.12784844636917114},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08465078473091125},{"id":"https://openalex.org/C23123220","wikidata":"https://www.wikidata.org/wiki/Q816826","display_name":"Information retrieval","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tetc.2022.3228575","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tetc.2022.3228575","pdf_url":null,"source":{"id":"https://openalex.org/S2496326734","display_name":"IEEE Transactions on Emerging Topics in Computing","issn_l":"2168-6750","issn":["2168-6750","2376-4562"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Emerging Topics in Computing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":31,"referenced_works":["https://openalex.org/W1902965424","https://openalex.org/W2030081822","https://openalex.org/W2037524288","https://openalex.org/W2069852500","https://openalex.org/W2072974923","https://openalex.org/W2112313615","https://openalex.org/W2143909327","https://openalex.org/W2279243576","https://openalex.org/W2508353373","https://openalex.org/W2545376626","https://openalex.org/W2726442390","https://openalex.org/W2733107613","https://openalex.org/W2890524446","https://openalex.org/W2912695634","https://openalex.org/W2949320316","https://openalex.org/W2991589328","https://openalex.org/W3007009247","https://openalex.org/W3043363332","https://openalex.org/W3093980743","https://openalex.org/W3132370594","https://openalex.org/W3133347161","https://openalex.org/W3133395503","https://openalex.org/W3139694570","https://openalex.org/W3155985958","https://openalex.org/W3216389237","https://openalex.org/W4200161267","https://openalex.org/W4200197440","https://openalex.org/W4210558642","https://openalex.org/W4211113317","https://openalex.org/W4211147898","https://openalex.org/W6803719408"],"related_works":["https://openalex.org/W2095055219","https://openalex.org/W2362374543","https://openalex.org/W2116295091","https://openalex.org/W4319430205","https://openalex.org/W3121711078","https://openalex.org/W927337369","https://openalex.org/W3198265738","https://openalex.org/W2353068449","https://openalex.org/W2348196682","https://openalex.org/W2085265870"],"abstract_inverted_index":{"The":[0],"emergence":[1],"of":[2,13,53,83,182],"high-bandwidth":[3],"memory":[4,26],"(HBM)":[5],"brings":[6],"new":[7],"opportunities":[8],"to":[9,34,86,118,136,142,156,168],"boost":[10],"the":[11,23,41,50,58,72,89,109,126,131,144],"performance":[12,74,181],"sorting":[14,73,102,180],"acceleration":[15],"on":[16],"FPGAs,":[17],"which":[18],"was":[19],"conventionally":[20],"bounded":[21],"by":[22],"available":[24,54],"off-chip":[25,55],"bandwidth.":[27,39,91,124],"However,":[28],"it":[29],"is":[30,186],"nontrivial":[31],"for":[32,105],"designers":[33,78],"fully":[35,119],"utilize":[36,88,120],"this":[37],"immense":[38],"First,":[40],"existing":[42],"sorter":[43],"designs":[44],"cannot":[45],"be":[46],"directly":[47],"scaled":[48],"at":[49,64],"increasing":[51],"rate":[52,68],"bandwidth,":[56],"as":[57],"required":[59],"on-chip":[60],"resource":[61,158],"usage":[62],"grows":[63],"a":[65,99,138],"much":[66],"faster":[67,190],"and":[69,160,188,194],"would":[70],"bound":[71],"in":[75,116],"turn.":[76],"Second,":[77],"need":[79],"an":[80,178],"in-depth":[81],"understanding":[82],"HBM's":[84],"characteristics":[85],"effectively":[87],"HBM":[90,122,175],"To":[92],"tackle":[93],"these":[94],"challenges,":[95],"we":[96],"present":[97],"TopSort,":[98],"novel":[100],"two-phase":[101],"solution":[103],"optimized":[104],"HBM-based":[106],"FPGAs.":[107],"In":[108,125],"first":[110],"phase,":[111,128],"16":[112],"merge":[113,140,143],"trees":[114],"work":[115],"parallel":[117],"32":[121,174],"channels\u2019":[123],"second":[127],"TopSort":[129,151,164,185],"reuses":[130],"logic":[132],"from":[133,148],"phase":[134,149],"one":[135],"form":[137],"wider":[139],"tree":[141],"partially":[145],"sorted":[146],"results":[147],"one.":[150],"also":[152],"adopts":[153],"HBM-specific":[154],"optimizations":[155],"reduce":[157],"overhead":[159],"improve":[161],"bandwidth":[162],"utilization.":[163],"can":[165],"sort":[166],"up":[167],"4":[169],"GB":[170],"data":[171],"using":[172],"all":[173],"channels,":[176],"with":[177],"overall":[179],"15.6":[183],"GB/s.":[184],"6.7\u00d7":[187],"2.7\u00d7":[189],"than":[191],"state-of-the-art":[192],"CPU":[193],"FPGA":[195],"sorters.":[196]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":2}],"updated_date":"2026-06-13T07:54:00.901334","created_date":"2025-10-10T00:00:00"}