{"id":"https://openalex.org/W3203374159","doi":"https://doi.org/10.1109/tetc.2021.3115495","title":"Near Volatile and Non-Volatile Memory Processing in 3D Systems","display_name":"Near Volatile and Non-Volatile Memory Processing in 3D Systems","publication_year":2021,"publication_date":"2021-10-02","ids":{"openalex":"https://openalex.org/W3203374159","doi":"https://doi.org/10.1109/tetc.2021.3115495","mag":"3203374159"},"language":"en","primary_location":{"id":"doi:10.1109/tetc.2021.3115495","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tetc.2021.3115495","pdf_url":null,"source":{"id":"https://openalex.org/S2496326734","display_name":"IEEE Transactions on Emerging Topics in Computing","issn_l":"2168-6750","issn":["2168-6750","2376-4562"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Emerging Topics in Computing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5021279933","display_name":"Maryam S. Hosseini","orcid":"https://orcid.org/0000-0002-4250-2290"},"institutions":[{"id":"https://openalex.org/I204250578","display_name":"University of California, Irvine","ror":"https://ror.org/04gyf1771","country_code":"US","type":"education","lineage":["https://openalex.org/I204250578"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Maryam S. Hosseini","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, University of California, Irvine, CA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, University of California, Irvine, CA, USA","institution_ids":["https://openalex.org/I204250578"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060584048","display_name":"Masoumeh Ebrahimi","orcid":"https://orcid.org/0000-0001-7877-6712"},"institutions":[{"id":"https://openalex.org/I86987016","display_name":"KTH Royal Institute of Technology","ror":"https://ror.org/026vcq606","country_code":"SE","type":"education","lineage":["https://openalex.org/I86987016"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"Masoumeh Ebrahimi","raw_affiliation_strings":["Department of Electronics and Embedded Systems, KTH Royal Institute of Technology, Stockholm, Sweden"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Embedded Systems, KTH Royal Institute of Technology, Stockholm, Sweden","institution_ids":["https://openalex.org/I86987016"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109386875","display_name":"Pooria M. Yaghini","orcid":null},"institutions":[{"id":"https://openalex.org/I204250578","display_name":"University of California, Irvine","ror":"https://ror.org/04gyf1771","country_code":"US","type":"education","lineage":["https://openalex.org/I204250578"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Pooria Yaghini","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, University of California, Irvine, CA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, University of California, Irvine, CA, USA","institution_ids":["https://openalex.org/I204250578"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5012004974","display_name":"Nader Bagherzadeh","orcid":"https://orcid.org/0000-0001-7216-0546"},"institutions":[{"id":"https://openalex.org/I204250578","display_name":"University of California, Irvine","ror":"https://ror.org/04gyf1771","country_code":"US","type":"education","lineage":["https://openalex.org/I204250578"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nader Bagherzadeh","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, University of California, Irvine, CA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, University of California, Irvine, CA, USA","institution_ids":["https://openalex.org/I204250578"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5021279933"],"corresponding_institution_ids":["https://openalex.org/I204250578"],"apc_list":null,"apc_paid":null,"fwci":0.8022,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.72041907,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":100},"biblio":{"volume":"10","issue":"3","first_page":"1657","last_page":"1664"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.8417201042175293},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7899497747421265},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.6495521068572998},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.5718303322792053},{"id":"https://openalex.org/keywords/non-volatile-random-access-memory","display_name":"Non-volatile random-access memory","score":0.43872883915901184},{"id":"https://openalex.org/keywords/systems-architecture","display_name":"Systems architecture","score":0.4369460344314575},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.42557492852211},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.41754305362701416},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.40297889709472656},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3546936511993408},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3426995873451233},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.299970418214798},{"id":"https://openalex.org/keywords/computer-memory","display_name":"Computer memory","score":0.25364285707473755},{"id":"https://openalex.org/keywords/memory-refresh","display_name":"Memory refresh","score":0.13676273822784424}],"concepts":[{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.8417201042175293},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7899497747421265},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.6495521068572998},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.5718303322792053},{"id":"https://openalex.org/C34172316","wikidata":"https://www.wikidata.org/wiki/Q499024","display_name":"Non-volatile random-access memory","level":5,"score":0.43872883915901184},{"id":"https://openalex.org/C98025372","wikidata":"https://www.wikidata.org/wiki/Q477538","display_name":"Systems architecture","level":3,"score":0.4369460344314575},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.42557492852211},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.41754305362701416},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.40297889709472656},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3546936511993408},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3426995873451233},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.299970418214798},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.25364285707473755},{"id":"https://openalex.org/C87907426","wikidata":"https://www.wikidata.org/wiki/Q6815755","display_name":"Memory refresh","level":4,"score":0.13676273822784424},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tetc.2021.3115495","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tetc.2021.3115495","pdf_url":null,"source":{"id":"https://openalex.org/S2496326734","display_name":"IEEE Transactions on Emerging Topics in Computing","issn_l":"2168-6750","issn":["2168-6750","2376-4562"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Emerging Topics in Computing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8199999928474426,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320308590","display_name":"University of California","ror":"https://ror.org/00pjdza24"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":32,"referenced_works":["https://openalex.org/W1521139607","https://openalex.org/W1975237352","https://openalex.org/W1981220134","https://openalex.org/W2002555321","https://openalex.org/W2004823737","https://openalex.org/W2023264348","https://openalex.org/W2028802049","https://openalex.org/W2034861439","https://openalex.org/W2048466306","https://openalex.org/W2080592089","https://openalex.org/W2092324191","https://openalex.org/W2112547256","https://openalex.org/W2112980698","https://openalex.org/W2114139104","https://openalex.org/W2116784058","https://openalex.org/W2147926533","https://openalex.org/W2164431468","https://openalex.org/W2169783318","https://openalex.org/W2250217037","https://openalex.org/W2433248078","https://openalex.org/W2487018225","https://openalex.org/W2538324518","https://openalex.org/W2545376626","https://openalex.org/W2769084511","https://openalex.org/W2799830793","https://openalex.org/W3008756550","https://openalex.org/W3043023836","https://openalex.org/W4244607449","https://openalex.org/W4245923077","https://openalex.org/W4292169167","https://openalex.org/W6728475365","https://openalex.org/W6751248176"],"related_works":["https://openalex.org/W2169710001","https://openalex.org/W2061905268","https://openalex.org/W2396406070","https://openalex.org/W2889233234","https://openalex.org/W2997345301","https://openalex.org/W2086804599","https://openalex.org/W3091205277","https://openalex.org/W2492851785","https://openalex.org/W3015199240","https://openalex.org/W3203374159"],"abstract_inverted_index":{"The":[0],"cost":[1],"of":[2,28,78,109],"transferring":[3],"data":[4],"between":[5],"the":[6,14,26,59,74,97,107],"off-chip":[7],"memory":[8],"system":[9,63],"and":[10,17,32,76,93],"compute":[11],"unit":[12],"is":[13],"fundamental":[15],"energy":[16],"performance":[18],"bottleneck":[19,36],"in":[20],"modern":[21],"computing":[22],"systems.":[23],"Furthermore,":[24],"with":[25,96,112],"advent":[27],"emerging":[29,85],"data-intensive":[30,91],"applications":[31,92],"technology":[33,56,88],"scaling,":[34],"this":[35,70],"has":[37],"continuously":[38],"increased.":[39],"To":[40],"overcome":[41],"these":[42],"difficulties,":[43],"Near":[44],"Memory":[45,87],"Processing":[46],"(NMP)":[47],"based":[48,82,102],"on":[49,83,103],"3D":[50],"die":[51],"stacking":[52],"becomes":[53],"a":[54,79],"potential":[55],"to":[57],"transform":[58],"<italic":[60,65],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[61,66],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">computation-centric</i>":[62],"towards":[64],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">memory-centric</i>":[67],"system.":[68],"In":[69],"work,":[71],"we":[72],"explore":[73],"feasibility":[75],"efficacy":[77],"NMP":[80,100],"architecture":[81,101],"an":[84],"Non-Volatile":[86],"(NVM)":[89],"for":[90],"compare":[94],"it":[95],"conventional":[98],"3D-stacked":[99],"DRAM.":[104],"We":[105],"demonstrate":[106],"effectiveness":[108],"our":[110],"approach":[111],"experimental":[113],"results.":[114]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":3}],"updated_date":"2026-02-26T08:16:20.718346","created_date":"2025-10-10T00:00:00"}