{"id":"https://openalex.org/W3000646767","doi":"https://doi.org/10.1109/tetc.2020.2965193","title":"Combined Symbol Error Correction and Spare Through-Silicon Vias for 3D Memories","display_name":"Combined Symbol Error Correction and Spare Through-Silicon Vias for 3D Memories","publication_year":2020,"publication_date":"2020-01-09","ids":{"openalex":"https://openalex.org/W3000646767","doi":"https://doi.org/10.1109/tetc.2020.2965193","mag":"3000646767"},"language":"en","primary_location":{"id":"doi:10.1109/tetc.2020.2965193","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tetc.2020.2965193","pdf_url":null,"source":{"id":"https://openalex.org/S2496326734","display_name":"IEEE Transactions on Emerging Topics in Computing","issn_l":"2168-6750","issn":["2168-6750","2376-4562"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Emerging Topics in Computing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5088891897","display_name":"Francisco Garc\u00eda-Herrero","orcid":"https://orcid.org/0000-0001-6719-9681"},"institutions":[{"id":"https://openalex.org/I3020445194","display_name":"Universidad Nebrija","ror":"https://ror.org/03tzyrt94","country_code":"ES","type":"education","lineage":["https://openalex.org/I3020445194"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Francisco Garcia-Herrero","raw_affiliation_strings":["ARIES Research Center, Universidad Antonio de Nebrija, C/ Pirineos, Madrid, Spain"],"raw_orcid":"https://orcid.org/0000-0001-6719-9681","affiliations":[{"raw_affiliation_string":"ARIES Research Center, Universidad Antonio de Nebrija, C/ Pirineos, Madrid, Spain","institution_ids":["https://openalex.org/I3020445194"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078857723","display_name":"Alfonso S\u00e1nchez\u2010Maci\u00e1n","orcid":"https://orcid.org/0000-0002-2220-0594"},"institutions":[{"id":"https://openalex.org/I3020445194","display_name":"Universidad Nebrija","ror":"https://ror.org/03tzyrt94","country_code":"ES","type":"education","lineage":["https://openalex.org/I3020445194"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Alfonso Sanchez-Macian","raw_affiliation_strings":["ARIES Research Center, Universidad Antonio de Nebrija, C/ Pirineos, Madrid, Spain"],"raw_orcid":"https://orcid.org/0000-0002-2220-0594","affiliations":[{"raw_affiliation_string":"ARIES Research Center, Universidad Antonio de Nebrija, C/ Pirineos, Madrid, Spain","institution_ids":["https://openalex.org/I3020445194"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5044495372","display_name":"Juan Antonio Maestro","orcid":"https://orcid.org/0000-0001-7133-9026"},"institutions":[{"id":"https://openalex.org/I3020445194","display_name":"Universidad Nebrija","ror":"https://ror.org/03tzyrt94","country_code":"ES","type":"education","lineage":["https://openalex.org/I3020445194"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Juan Antonio Maestro","raw_affiliation_strings":["ARIES Research Center, Universidad Antonio de Nebrija, C/ Pirineos, Madrid, Spain"],"raw_orcid":"https://orcid.org/0000-0001-7133-9026","affiliations":[{"raw_affiliation_string":"ARIES Research Center, Universidad Antonio de Nebrija, C/ Pirineos, Madrid, Spain","institution_ids":["https://openalex.org/I3020445194"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I3020445194"],"apc_list":null,"apc_paid":null,"fwci":0.5047,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.62556758,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"9","issue":"4","first_page":"2139","last_page":"2145"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/spare-part","display_name":"Spare part","score":0.8541808128356934},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6768571138381958},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.6043670177459717},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5181949734687805},{"id":"https://openalex.org/keywords/error-detection-and-correction","display_name":"Error detection and correction","score":0.4901216924190521},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.45399364829063416},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.4518836736679077},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4312328100204468},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2199609875679016},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1947571337223053},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.10967594385147095}],"concepts":[{"id":"https://openalex.org/C194648553","wikidata":"https://www.wikidata.org/wiki/Q1364774","display_name":"Spare part","level":2,"score":0.8541808128356934},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6768571138381958},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.6043670177459717},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5181949734687805},{"id":"https://openalex.org/C103088060","wikidata":"https://www.wikidata.org/wiki/Q1062839","display_name":"Error detection and correction","level":2,"score":0.4901216924190521},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.45399364829063416},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.4518836736679077},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4312328100204468},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2199609875679016},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1947571337223053},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.10967594385147095},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tetc.2020.2965193","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tetc.2020.2965193","pdf_url":null,"source":{"id":"https://openalex.org/S2496326734","display_name":"IEEE Transactions on Emerging Topics in Computing","issn_l":"2168-6750","issn":["2168-6750","2376-4562"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Emerging Topics in Computing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":29,"referenced_works":["https://openalex.org/W2017545378","https://openalex.org/W2050902046","https://openalex.org/W2062899780","https://openalex.org/W2068715387","https://openalex.org/W2069273723","https://openalex.org/W2075850503","https://openalex.org/W2090396476","https://openalex.org/W2107304970","https://openalex.org/W2111101793","https://openalex.org/W2120000030","https://openalex.org/W2136233929","https://openalex.org/W2522781526","https://openalex.org/W2532349170","https://openalex.org/W2622148586","https://openalex.org/W2622164283","https://openalex.org/W2768675673","https://openalex.org/W2789587764","https://openalex.org/W2875898617","https://openalex.org/W2892891161","https://openalex.org/W2900334641","https://openalex.org/W2904932589","https://openalex.org/W2908944557","https://openalex.org/W2921123532","https://openalex.org/W3102618228","https://openalex.org/W3144072891","https://openalex.org/W4234572373","https://openalex.org/W4255435342","https://openalex.org/W6678502064","https://openalex.org/W6679967228"],"related_works":["https://openalex.org/W2376859990","https://openalex.org/W2381161177","https://openalex.org/W2912704652","https://openalex.org/W2319226115","https://openalex.org/W830772239","https://openalex.org/W2366601680","https://openalex.org/W2970750595","https://openalex.org/W2392193501","https://openalex.org/W2018755015","https://openalex.org/W2037271671"],"abstract_inverted_index":{"Three":[0],"dimensional":[1],"technology":[2],"provides":[3],"high":[4],"density":[5],"and":[6,44,53,67,100,115],"bandwidth":[7],"solutions":[8],"for":[9,26],"high-speed":[10],"computing.":[11],"Through-silicon":[12],"vias":[13],"(TSVs)":[14],"are":[15,73,78],"used":[16],"to":[17,47,80,110,119],"interconnect":[18],"different":[19],"layers":[20],"of":[21,88],"the":[22,41,49],"stacked":[23],"dies.":[24],"Covering":[25],"faulty":[27,55,122],"TSVs":[28,39,56],"caused":[29],"by":[30,36,61],"manufacturing":[31],"irregularities":[32],"can":[33,57,94],"be":[34,59,95],"done":[35],"including":[37],"spare":[38,112],"in":[40,84],"chip":[42],"design":[43],"rerouting":[45],"signals":[46],"avoid":[48],"problematic":[50],"vias.":[51],"Temporary":[52],"permanent":[54],"also":[58],"produced":[60],"other":[62],"effects":[63],"such":[64],"as":[65,97],"radiation":[66],"mechanical":[68],"stress.":[69],"Reed-Solomon":[70],"(RS)":[71],"codes":[72,76],"error":[74],"correcting":[75],"that":[77],"able":[79],"protect":[81],"against":[82],"errors":[83],"symbols.":[85],"A":[86],"set":[87],"bits":[89,118],"transmitted":[90],"through":[91],"a":[92,98,108],"TSV":[93],"considered":[96],"symbol":[99],"protected":[101],"using":[102],"RS":[103,114],"codes.":[104],"This":[105],"article":[106],"presents":[107],"scheme":[109],"combine":[111],"TSVs,":[113],"hardwired":[116],"seed":[117],"cope":[120],"with":[121],"TSVs.":[123]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}