{"id":"https://openalex.org/W2594464243","doi":"https://doi.org/10.1109/tetc.2017.2677400","title":"Improving Testability and Reliability of Advanced SRAM Architectures","display_name":"Improving Testability and Reliability of Advanced SRAM Architectures","publication_year":2017,"publication_date":"2017-03-03","ids":{"openalex":"https://openalex.org/W2594464243","doi":"https://doi.org/10.1109/tetc.2017.2677400","mag":"2594464243"},"language":"en","primary_location":{"id":"doi:10.1109/tetc.2017.2677400","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tetc.2017.2677400","pdf_url":null,"source":{"id":"https://openalex.org/S2496326734","display_name":"IEEE Transactions on Emerging Topics in Computing","issn_l":"2168-6750","issn":["2168-6750","2376-4562"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Emerging Topics in Computing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5067545661","display_name":"Josef Kinseher","orcid":"https://orcid.org/0000-0001-6923-1059"},"institutions":[{"id":"https://openalex.org/I4210094487","display_name":"Intel (Germany)","ror":"https://ror.org/00m2x0g47","country_code":"DE","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210094487"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Josef Kinseher","raw_affiliation_strings":["Intel Deutschland, Neubiberg, Germany"],"raw_orcid":"https://orcid.org/0000-0001-6923-1059","affiliations":[{"raw_affiliation_string":"Intel Deutschland, Neubiberg, Germany","institution_ids":["https://openalex.org/I4210094487"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027254641","display_name":"Moritz Voelker","orcid":null},"institutions":[{"id":"https://openalex.org/I4210094487","display_name":"Intel (Germany)","ror":"https://ror.org/00m2x0g47","country_code":"DE","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210094487"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Moritz Voelker","raw_affiliation_strings":["Intel Deutschland, Neubiberg, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Deutschland, Neubiberg, Germany","institution_ids":["https://openalex.org/I4210094487"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5027416202","display_name":"Ilia Polian","orcid":"https://orcid.org/0000-0002-6563-2725"},"institutions":[{"id":"https://openalex.org/I186354981","display_name":"University of Passau","ror":"https://ror.org/05ydjnb78","country_code":"DE","type":"education","lineage":["https://openalex.org/I186354981"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Ilia Polian","raw_affiliation_strings":["University of Passau, Passau, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Passau, Passau, Germany","institution_ids":["https://openalex.org/I186354981"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.8448,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.74374315,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"7","issue":"3","first_page":"456","last_page":"467"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7650774717330933},{"id":"https://openalex.org/keywords/testability","display_name":"Testability","score":0.707598865032196},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6416337490081787},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5833255052566528},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.580730140209198},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.5525920391082764},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.5485842227935791},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.42372092604637146},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3272123634815216},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.22843575477600098},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20517611503601074}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7650774717330933},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.707598865032196},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6416337490081787},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5833255052566528},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.580730140209198},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.5525920391082764},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.5485842227935791},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.42372092604637146},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3272123634815216},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.22843575477600098},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20517611503601074},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tetc.2017.2677400","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tetc.2017.2677400","pdf_url":null,"source":{"id":"https://openalex.org/S2496326734","display_name":"IEEE Transactions on Emerging Topics in Computing","issn_l":"2168-6750","issn":["2168-6750","2376-4562"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Emerging Topics in Computing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.5199999809265137}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":41,"referenced_works":["https://openalex.org/W11171666","https://openalex.org/W91506431","https://openalex.org/W1596163276","https://openalex.org/W1667843264","https://openalex.org/W1997825961","https://openalex.org/W2007506199","https://openalex.org/W2046722603","https://openalex.org/W2047956117","https://openalex.org/W2072478086","https://openalex.org/W2095953597","https://openalex.org/W2096607693","https://openalex.org/W2100483769","https://openalex.org/W2102785080","https://openalex.org/W2106246015","https://openalex.org/W2111475681","https://openalex.org/W2112342901","https://openalex.org/W2118168173","https://openalex.org/W2121657613","https://openalex.org/W2122507955","https://openalex.org/W2123278390","https://openalex.org/W2128563080","https://openalex.org/W2132621842","https://openalex.org/W2135163821","https://openalex.org/W2135719553","https://openalex.org/W2137706187","https://openalex.org/W2139286506","https://openalex.org/W2140004775","https://openalex.org/W2148393400","https://openalex.org/W2151679526","https://openalex.org/W2151824694","https://openalex.org/W2153355333","https://openalex.org/W2162613878","https://openalex.org/W2346689165","https://openalex.org/W2406987849","https://openalex.org/W2613010563","https://openalex.org/W4235721667","https://openalex.org/W4244759228","https://openalex.org/W4251213825","https://openalex.org/W6600460264","https://openalex.org/W6649741387","https://openalex.org/W6682433079"],"related_works":["https://openalex.org/W3037788266","https://openalex.org/W2157191248","https://openalex.org/W2107525390","https://openalex.org/W2150046587","https://openalex.org/W2164493372","https://openalex.org/W2153086993","https://openalex.org/W2114980936","https://openalex.org/W4245595174","https://openalex.org/W2115513740","https://openalex.org/W2539511314"],"abstract_inverted_index":{"As":[0],"process":[1,31],"technology":[2,160],"continues":[3],"to":[4,43,114,124,135,145,175,183],"scale,":[5],"the":[6,58,102,119,126,163,197],"test":[7,41,54,193],"quality,":[8],"yield":[9],"and":[10,69,97,118,178],"reliability":[11,67],"of":[12,128,165],"modern":[13,90],"System-on-Chips":[14],"increasingly":[15,39],"depend":[16],"on":[17,156],"their":[18],"embedded":[19],"SRAM":[20,78],"blocks.":[21],"Their":[22],"extreme":[23],"integration":[24],"density":[25],"in":[26,33,200],"conjunction":[27],"with":[28],"complex":[29],"manufacturing":[30],"result":[32],"subtle":[34],"lithographic":[35],"imperfections":[36],"which":[37,141,195],"demand":[38],"effective":[40],"solutions":[42],"guarantee":[44],"low":[45],"DPPM":[46],"(defective":[47],"parts":[48],"per":[49],"million)":[50],"rates":[51],"while":[52],"keeping":[53],"costs":[55],"low.":[56],"At":[57],"same":[59],"time,":[60],"SRAMs":[61],"are":[62,142,186],"particularly":[63],"affected":[64],"by":[65,72,173],"scaling-driven":[66],"challenges,":[68],"addressing":[70],"them":[71],"large":[73],"aging":[74,185],"guard-bands":[75],"further":[76],"deteriorates":[77],"yield.":[79],"In":[80,110],"this":[81],"work,":[82],"we":[83,112],"show":[84],"that":[85,162],"built-in":[86,205],"circuitry":[87],"integrated":[88],"into":[89],"memory":[91,121],"architectures":[92],"can":[93],"resolve":[94],"these":[95],"challenges":[96],"eliminate":[98],"or":[99],"greatly":[100],"reduce":[101],"need":[103],"for":[104,107,168],"additional":[105],"design":[106],"testability":[108],"logic.":[109],"particular,":[111],"propose":[113],"use":[115],"assist":[116],"circuits":[117],"inherent":[120],"self-timing":[122],"mechanism":[123],"increase":[125],"coverage":[127],"small":[129],"resistive-open":[130],"defects":[131,171],"as":[132,134],"well":[133],"specifically":[136],"screen":[137],"out":[138],"those":[139],"core-cells":[140],"most":[143],"susceptible":[144],"long-term":[146],"BTI":[147,184],"(Bias":[148],"Temperature":[149],"Instability)":[150],"aging.":[151],"A":[152],"detailed":[153],"fault-injection":[154],"study":[155],"an":[157,201],"industrial":[158,202],"28nm":[159],"demonstrates":[161],"range":[164],"detectable":[166],"resistances":[167],"cell-internal":[169],"open":[170],"increases":[172],"up":[174],"30":[176],"percent":[177],"potentially":[179],"unreliable":[180],"cells":[181],"prone":[182],"screened":[187],"out.":[188],"We":[189],"also":[190],"suggest":[191],"a":[192],"flow":[194],"applies":[196],"introduced":[198],"techniques":[199],"MBIST":[203],"(memory":[204],"self-test)":[206],"environment.":[207]},"counts_by_year":[{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":7},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}