{"id":"https://openalex.org/W2913851478","doi":"https://doi.org/10.1109/test.2018.8624850","title":"Access-Time Minimization in the IEEE 1687 Network Using Broadcast and Hardware Parallelism","display_name":"Access-Time Minimization in the IEEE 1687 Network Using Broadcast and Hardware Parallelism","publication_year":2018,"publication_date":"2018-10-01","ids":{"openalex":"https://openalex.org/W2913851478","doi":"https://doi.org/10.1109/test.2018.8624850","mag":"2913851478"},"language":"en","primary_location":{"id":"doi:10.1109/test.2018.8624850","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2018.8624850","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Test Conference (ITC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5025152730","display_name":"Zhanwei Zhong","orcid":"https://orcid.org/0000-0002-0946-574X"},"institutions":[{"id":"https://openalex.org/I170897317","display_name":"Duke University","ror":"https://ror.org/00py81415","country_code":"US","type":"education","lineage":["https://openalex.org/I170897317"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Zhanwei Zhong","raw_affiliation_strings":["ECE Dept, Duke University, Durham, NC, USA"],"affiliations":[{"raw_affiliation_string":"ECE Dept, Duke University, Durham, NC, USA","institution_ids":["https://openalex.org/I170897317"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100451571","display_name":"Guoliang Li","orcid":"https://orcid.org/0000-0001-8334-0446"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Guoliang Li","raw_affiliation_strings":["AMD Inc, Beijing, China"],"affiliations":[{"raw_affiliation_string":"AMD Inc, Beijing, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013351400","display_name":"Qinfu Yang","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Qinfu Yang","raw_affiliation_strings":["AMD Inc, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"AMD Inc, Shanghai, China","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5033880864","display_name":"Krishnendu Chakrabarty","orcid":"https://orcid.org/0000-0003-4475-6435"},"institutions":[{"id":"https://openalex.org/I170897317","display_name":"Duke University","ror":"https://ror.org/00py81415","country_code":"US","type":"education","lineage":["https://openalex.org/I170897317"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Krishnendu Chakrabarty","raw_affiliation_strings":["ECE Dept, Duke University, Durham, NC, USA"],"affiliations":[{"raw_affiliation_string":"ECE Dept, Duke University, Durham, NC, USA","institution_ids":["https://openalex.org/I170897317"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5025152730"],"corresponding_institution_ids":["https://openalex.org/I170897317"],"apc_list":null,"apc_paid":null,"fwci":1.2623,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.79956001,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":"34","issue":null,"first_page":"1","last_page":"10"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13293","display_name":"Engineering and Test Systems","score":0.9922999739646912,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.794503927230835},{"id":"https://openalex.org/keywords/minification","display_name":"Minification","score":0.5571418404579163},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.5435109734535217},{"id":"https://openalex.org/keywords/access-time","display_name":"Access time","score":0.5011031627655029},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.4880131781101227},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.47782042622566223},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.4697946310043335},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4517377018928528},{"id":"https://openalex.org/keywords/parallelism","display_name":"Parallelism (grammar)","score":0.41719821095466614},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.41395020484924316},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.376470685005188},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1030208170413971}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.794503927230835},{"id":"https://openalex.org/C147764199","wikidata":"https://www.wikidata.org/wiki/Q6865248","display_name":"Minification","level":2,"score":0.5571418404579163},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.5435109734535217},{"id":"https://openalex.org/C194080101","wikidata":"https://www.wikidata.org/wiki/Q46306","display_name":"Access time","level":2,"score":0.5011031627655029},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.4880131781101227},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.47782042622566223},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.4697946310043335},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4517377018928528},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.41719821095466614},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.41395020484924316},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.376470685005188},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1030208170413971},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/test.2018.8624850","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2018.8624850","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Test Conference (ITC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.6000000238418579,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W767201593","https://openalex.org/W1965393465","https://openalex.org/W2004363858","https://openalex.org/W2063123613","https://openalex.org/W2120890300","https://openalex.org/W2128285650","https://openalex.org/W2143586611","https://openalex.org/W2289198409","https://openalex.org/W2290686371","https://openalex.org/W2403474765","https://openalex.org/W2524658815","https://openalex.org/W2537567619","https://openalex.org/W2570543678","https://openalex.org/W2781852892","https://openalex.org/W2794493912","https://openalex.org/W2806425357"],"related_works":["https://openalex.org/W17155033","https://openalex.org/W3207760230","https://openalex.org/W1496222301","https://openalex.org/W4312814274","https://openalex.org/W1590307681","https://openalex.org/W2536018345","https://openalex.org/W4285370786","https://openalex.org/W2296488620","https://openalex.org/W2358353312","https://openalex.org/W2353836703"],"abstract_inverted_index":{"The":[0],"IEEE":[1],"Std.":[2],"1687":[3],"facilitates":[4],"flexible":[5],"access":[6,23,121],"to":[7,37,69,136],"on-chip":[8],"instruments":[9,48],"through":[10,62],"the":[11,18,21,35,42,63,72,111,119,138,141],"JTAG":[12],"test-access":[13],"port.":[14],"This":[15],"flexibility":[16],"enables":[17],"minimization":[19],"of":[20,29,54,140],"overall":[22],"time":[24,122],"(OAT),":[25],"and":[26,83,130],"a":[27,51],"number":[28],"techniques":[30],"have":[31],"been":[32],"proposed":[33,142],"in":[34],"literature":[36],"achieve":[38],"this":[39,58],"goal.":[40],"However,":[41],"OAT":[43],"is":[44,60,93,124],"still":[45],"high":[46],"for":[47,86],"that":[49,80,103,118],"require":[50],"large":[52],"amount":[53],"test":[55],"data":[56,59],"if":[57],"shifted":[61],"scan":[64],"chain":[65],"serially.":[66],"In":[67],"order":[68],"further":[70],"reduce":[71],"OAT,":[73],"we":[74,108],"present":[75],"an":[76],"efficient":[77,113],"test-scheduling":[78],"method":[79,92],"exploits":[81],"broadcast":[82,90],"hardware":[84],"parallelism":[85],"instrument":[87],"access.":[88],"A":[89],"scheduling":[91],"synergistically":[94],"combined":[95],"with":[96],"three":[97,131],"parallel":[98,114],"IJTAG":[99,115,132],"designs.":[100],"We":[101],"show":[102],"under":[104],"different":[105],"cost":[106],"criteria,":[107],"can":[109],"select":[110],"most":[112],"design":[116],"such":[117],"equivalent":[120],"(EAT)":[123],"minimized.":[125],"Two":[126],"industry":[127],"chip":[128],"designs":[129],"benchmarks":[133],"are":[134],"used":[135],"evaluate":[137],"effectiveness":[139],"method.":[143]},"counts_by_year":[{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}