{"id":"https://openalex.org/W2570739159","doi":"https://doi.org/10.1109/test.2016.7805857","title":"Advanced test methodology for complex SoCs","display_name":"Advanced test methodology for complex SoCs","publication_year":2016,"publication_date":"2016-11-01","ids":{"openalex":"https://openalex.org/W2570739159","doi":"https://doi.org/10.1109/test.2016.7805857","mag":"2570739159"},"language":"en","primary_location":{"id":"doi:10.1109/test.2016.7805857","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2016.7805857","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE International Test Conference (ITC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5041362633","display_name":"Pavan Kumar Datla Jagannadha","orcid":"https://orcid.org/0009-0007-7962-3727"},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Pavan Kumar Datla Jagannadha","raw_affiliation_strings":["DFT Engineering, NVIDIA Corp, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"DFT Engineering, NVIDIA Corp, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043179142","display_name":"Mahmut Yilmaz","orcid":"https://orcid.org/0000-0002-4522-7028"},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mahmut Yilmaz","raw_affiliation_strings":["DFT Engineering, NVIDIA Corp, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"DFT Engineering, NVIDIA Corp, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113516558","display_name":"Milind Sonawane","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Milind Sonawane","raw_affiliation_strings":["DFT Engineering, NVIDIA Corp, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"DFT Engineering, NVIDIA Corp, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065631513","display_name":"Sailendra Chadalavada","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sailendra Chadalavada","raw_affiliation_strings":["DFT Engineering, NVIDIA Corp, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"DFT Engineering, NVIDIA Corp, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009749203","display_name":"Shantanu Sarangi","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shantanu Sarangi","raw_affiliation_strings":["DFT Engineering, NVIDIA Corp, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"DFT Engineering, NVIDIA Corp, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085906985","display_name":"Bonita Bhaskaran","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Bonita Bhaskaran","raw_affiliation_strings":["DFT Engineering, NVIDIA Corp, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"DFT Engineering, NVIDIA Corp, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5021581865","display_name":"Ayub Abdollahian","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ayub Abdollahian","raw_affiliation_strings":["DFT Engineering, NVIDIA Corp, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"DFT Engineering, NVIDIA Corp, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I4210127875"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5041362633"],"corresponding_institution_ids":["https://openalex.org/I4210127875"],"apc_list":null,"apc_paid":null,"fwci":2.838,"has_fulltext":false,"cited_by_count":18,"citation_normalized_percentile":{"value":0.90812488,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"10"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6818808913230896},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6484420299530029},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.6411615014076233},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.59370356798172},{"id":"https://openalex.org/keywords/reuse","display_name":"Reuse","score":0.5280153155326843},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.47273173928260803},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.45542022585868835},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.4437046945095062},{"id":"https://openalex.org/keywords/graphics","display_name":"Graphics","score":0.4410712718963623},{"id":"https://openalex.org/keywords/unit-testing","display_name":"Unit testing","score":0.42650726437568665},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4246799349784851},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4102098047733307},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.21613481640815735},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21360310912132263},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.18680882453918457},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.16284534335136414}],"concepts":[{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6818808913230896},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6484420299530029},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.6411615014076233},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.59370356798172},{"id":"https://openalex.org/C206588197","wikidata":"https://www.wikidata.org/wiki/Q846574","display_name":"Reuse","level":2,"score":0.5280153155326843},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.47273173928260803},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.45542022585868835},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.4437046945095062},{"id":"https://openalex.org/C21442007","wikidata":"https://www.wikidata.org/wiki/Q1027879","display_name":"Graphics","level":2,"score":0.4410712718963623},{"id":"https://openalex.org/C148027188","wikidata":"https://www.wikidata.org/wiki/Q907375","display_name":"Unit testing","level":3,"score":0.42650726437568665},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4246799349784851},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4102098047733307},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.21613481640815735},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21360310912132263},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.18680882453918457},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.16284534335136414},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C548081761","wikidata":"https://www.wikidata.org/wiki/Q180388","display_name":"Waste management","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/test.2016.7805857","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2016.7805857","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE International Test Conference (ITC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.46000000834465027,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320309480","display_name":"Nvidia","ror":"https://ror.org/03jdj4y14"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W1487165447","https://openalex.org/W1567437819","https://openalex.org/W1917503894","https://openalex.org/W1966348745","https://openalex.org/W1977977548","https://openalex.org/W1994851507","https://openalex.org/W2011433929","https://openalex.org/W2015184298","https://openalex.org/W2041508134","https://openalex.org/W2092476010","https://openalex.org/W2101900253","https://openalex.org/W2112041422","https://openalex.org/W2131432014","https://openalex.org/W2138784704","https://openalex.org/W2154781197","https://openalex.org/W2158963606","https://openalex.org/W2296529627","https://openalex.org/W2397017703","https://openalex.org/W2401126153","https://openalex.org/W2402469790","https://openalex.org/W2538602038","https://openalex.org/W6673872666","https://openalex.org/W6682599810"],"related_works":["https://openalex.org/W2615173508","https://openalex.org/W1978339999","https://openalex.org/W2360400548","https://openalex.org/W2384601745","https://openalex.org/W2537171119","https://openalex.org/W2367495590","https://openalex.org/W2048370503","https://openalex.org/W2362119228","https://openalex.org/W2106258585","https://openalex.org/W2129632153"],"abstract_inverted_index":{"This":[0],"paper":[1,22],"presents":[2],"the":[3,24,28,40,58,63,83,90,104],"latest":[4],"test":[5,49,54,59,64,88],"methodology":[6,72],"for":[7,87],"NVIDIA's":[8],"multi-billion":[9],"transistor":[10],"Mobile":[11],"System":[12],"on":[13],"Chip":[14],"(SoC)":[15],"and":[16,52,77],"Graphics":[17],"Processing":[18],"Unit":[19],"(GPU).":[20],"The":[21],"describes":[23],"innovations":[25],"that":[26],"enhance":[27],"SoC":[29,93],"plug-n-play":[30],"scheme":[31],"in":[32],"terms":[33],"of":[34,92,106],"DFT.":[35],"It":[36],"also":[37],"demonstrates":[38],"how":[39],"architecture":[41],"enables":[42],"ultra-low":[43],"pin":[44],"count":[45],"testing":[46],"together":[47],"with":[48,74],"data":[50],"reuse":[51],"efficient":[53],"scheduling":[55],"to":[56,102],"improve":[57],"quality":[60],"while":[61,81],"lowering":[62],"cost.":[65],"We":[66],"present":[67],"a":[68],"scalable":[69],"scan":[70],"interface":[71],"coupled":[73],"core":[75],"isolation":[76],"advanced":[78],"clocking":[79],"design":[80],"keeping":[82],"overall":[84],"power":[85],"budget":[86],"within":[89],"limits":[91],"Thermal":[94],"Design":[95],"Power":[96],"(TDP).":[97],"Silicon":[98],"results":[99],"are":[100],"shared":[101],"demonstrate":[103],"effectiveness":[105],"this":[107],"architecture.":[108]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":6},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
