{"id":"https://openalex.org/W1971317122","doi":"https://doi.org/10.1109/test.2014.7035282","title":"Security solutions in the first-generation Zynq All-Programmable SoC","display_name":"Security solutions in the first-generation Zynq All-Programmable SoC","publication_year":2014,"publication_date":"2014-10-01","ids":{"openalex":"https://openalex.org/W1971317122","doi":"https://doi.org/10.1109/test.2014.7035282","mag":"1971317122"},"language":"en","primary_location":{"id":"doi:10.1109/test.2014.7035282","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2014.7035282","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 International Test Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111830282","display_name":"Steve Trimberger","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Steve Trimberger","raw_affiliation_strings":["Xilinx, USA","Xilinx (USA)"],"affiliations":[{"raw_affiliation_string":"Xilinx, USA","institution_ids":["https://openalex.org/I32923980"]},{"raw_affiliation_string":"Xilinx (USA)","institution_ids":["https://openalex.org/I32923980"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5111830282"],"corresponding_institution_ids":["https://openalex.org/I32923980"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.05029271,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"1"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11424","display_name":"Security and Verification in Computing","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9941999912261963,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.734500527381897},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7269136905670166},{"id":"https://openalex.org/keywords/programmable-logic-device","display_name":"Programmable logic device","score":0.7101731300354004},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6821427345275879},{"id":"https://openalex.org/keywords/encryption","display_name":"Encryption","score":0.6482306718826294},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.520220935344696},{"id":"https://openalex.org/keywords/simple-programmable-logic-device","display_name":"Simple programmable logic device","score":0.5145965814590454},{"id":"https://openalex.org/keywords/programmable-logic-array","display_name":"Programmable logic array","score":0.4951092302799225},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4926179051399231},{"id":"https://openalex.org/keywords/bitstream","display_name":"Bitstream","score":0.4858414828777313},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.32543492317199707},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.23711451888084412},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.19699043035507202},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.07972347736358643}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.734500527381897},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7269136905670166},{"id":"https://openalex.org/C206274596","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Programmable logic device","level":2,"score":0.7101731300354004},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6821427345275879},{"id":"https://openalex.org/C148730421","wikidata":"https://www.wikidata.org/wiki/Q141090","display_name":"Encryption","level":2,"score":0.6482306718826294},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.520220935344696},{"id":"https://openalex.org/C34370810","wikidata":"https://www.wikidata.org/wiki/Q3961319","display_name":"Simple programmable logic device","level":5,"score":0.5145965814590454},{"id":"https://openalex.org/C182322920","wikidata":"https://www.wikidata.org/wiki/Q2112217","display_name":"Programmable logic array","level":3,"score":0.4951092302799225},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4926179051399231},{"id":"https://openalex.org/C136695289","wikidata":"https://www.wikidata.org/wiki/Q415568","display_name":"Bitstream","level":3,"score":0.4858414828777313},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.32543492317199707},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.23711451888084412},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.19699043035507202},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.07972347736358643},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.0},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/test.2014.7035282","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2014.7035282","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 International Test Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4699999988079071,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2187918628","https://openalex.org/W1607849496","https://openalex.org/W1512285683","https://openalex.org/W1522436970","https://openalex.org/W2197466303","https://openalex.org/W2139569078","https://openalex.org/W2151236218","https://openalex.org/W4234601000","https://openalex.org/W2368888192","https://openalex.org/W2147419146"],"abstract_inverted_index":{"FPGAs":[0],"have":[1],"grown":[2],"from":[3],"a":[4,15],"simple":[5],"logic":[6,27,141],"replacement":[7],"to":[8,64,98],"fully-programmable":[9],"SoC,":[10],"with":[11,122],"multi-core":[12],"CPU":[13],"subsystems,":[14],"broad":[16],"spectrum":[17],"of":[18,21,23,25,35,45,75,79],"peripherals,":[19],"hundreds":[20],"thousands":[22],"gates":[24],"programmable":[26,102,140],"and":[28,51,90,101,117,119,138],"high-speed":[29],"multi-gigabit":[30],"transceivers.":[31],"As":[32],"the":[33,36,43,46,52,76,80,108,131,136,139],"complexity":[34],"underlying":[37],"hardware":[38,103,109],"has":[39,42,61],"grown,":[40],"so":[41],"value":[44],"applications":[47],"built":[48],"in":[49],"them":[50],"data":[53],"handled":[54],"by":[55],"them.":[56],"Traditional":[57],"FPGA":[58],"bitstream":[59],"security":[60,68,77],"been":[62],"enhanced":[63],"address":[65],"these":[66],"greater":[67],"requirements.":[69],"This":[70],"paper":[71],"presents":[72],"an":[73],"overview":[74],"features":[78],"Zynq":[81],"All-Programmable":[82],"SoC.":[83],"The":[84],"secure":[85],"boot":[86],"process":[87],"includes":[88],"asymmetric":[89],"symmetric":[91,96],"authentication":[92],"as":[93,95],"well":[94],"encryption":[97],"protect":[99],"software":[100],"during":[104],"programming.":[105],"During":[106],"operation":[107],"can":[110],"disable":[111],"test":[112],"ports,":[113],"monitor":[114],"on-chip":[115],"power":[116],"temperature":[118],"detect":[120],"tampering":[121],"configuration":[123],"data.":[124],"ARM":[125],"Trust":[126],"Zone":[127],"is":[128],"integrated":[129],"through":[130],"AXI":[132],"busses":[133],"into":[134],"both":[135],"processor":[137],"subsystems.":[142]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}