{"id":"https://openalex.org/W2034988745","doi":"https://doi.org/10.1109/test.2010.5699242","title":"Validating the performance of a 32nm CMOS high speed serial link receiver with adaptive equalization and baud-rate clock data recovery","display_name":"Validating the performance of a 32nm CMOS high speed serial link receiver with adaptive equalization and baud-rate clock data recovery","publication_year":2010,"publication_date":"2010-11-01","ids":{"openalex":"https://openalex.org/W2034988745","doi":"https://doi.org/10.1109/test.2010.5699242","mag":"2034988745"},"language":"en","primary_location":{"id":"doi:10.1109/test.2010.5699242","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2010.5699242","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE International Test Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5070779291","display_name":"Sudeep Puligundla","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Sudeep Puligundla","raw_affiliation_strings":["Intel, Hillsboro, OR","Intel, Hillsboro, OR, 2111 NE 25th Avenue, M.S: JF4-215, Hillsboro, 97124, USA"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel, Hillsboro, OR, 2111 NE 25th Avenue, M.S: JF4-215, Hillsboro, 97124, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049095169","display_name":"Fulvio Spagna","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Fulvio Spagna","raw_affiliation_strings":["Intel, Hillsboro, OR, USA","Intel, Santa Clara, CA, 2111 NE 25th Avenue, M.S: JF4-215, Hillsboro, OR - 97124, USA"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel, Santa Clara, CA, 2111 NE 25th Avenue, M.S: JF4-215, Hillsboro, OR - 97124, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100718544","display_name":"Lidong Chen","orcid":"https://orcid.org/0000-0002-9683-037X"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Lidong Chen","raw_affiliation_strings":["Intel, Hillsboro, OR, USA","Intel, Santa Clara, CA, 2111 NE 25th Avenue, M.S: JF4-215, Hillsboro, OR - 97124, USA"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel, Santa Clara, CA, 2111 NE 25th Avenue, M.S: JF4-215, Hillsboro, OR - 97124, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103464261","display_name":"Amanda Tran","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Amanda Tran","raw_affiliation_strings":["Intel, Hillsboro, OR, USA","Intel, Santa Clara, CA, 2111 NE 25th Avenue, M.S: JF4-215, Hillsboro, OR - 97124, USA"],"affiliations":[{"raw_affiliation_string":"Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel, Santa Clara, CA, 2111 NE 25th Avenue, M.S: JF4-215, Hillsboro, OR - 97124, USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5070779291"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":0.4994,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.65818637,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/baud","display_name":"Baud","score":0.7245879173278809},{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.7108302712440491},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6925678849220276},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6264212727546692},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.5463233590126038},{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.48947131633758545},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4684358239173889},{"id":"https://openalex.org/keywords/serdes","display_name":"SerDes","score":0.429690420627594},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.36984503269195557},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.30283087491989136},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16356423497200012},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10837686061859131},{"id":"https://openalex.org/keywords/transmission","display_name":"Transmission (telecommunications)","score":0.09536978602409363}],"concepts":[{"id":"https://openalex.org/C169606439","wikidata":"https://www.wikidata.org/wiki/Q192027","display_name":"Baud","level":3,"score":0.7245879173278809},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.7108302712440491},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6925678849220276},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6264212727546692},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.5463233590126038},{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.48947131633758545},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4684358239173889},{"id":"https://openalex.org/C19707634","wikidata":"https://www.wikidata.org/wiki/Q6510662","display_name":"SerDes","level":2,"score":0.429690420627594},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.36984503269195557},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.30283087491989136},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16356423497200012},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10837686061859131},{"id":"https://openalex.org/C761482","wikidata":"https://www.wikidata.org/wiki/Q118093","display_name":"Transmission (telecommunications)","level":2,"score":0.09536978602409363},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/test.2010.5699242","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2010.5699242","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE International Test Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1538882755","https://openalex.org/W1999903189","https://openalex.org/W2130014519","https://openalex.org/W2160574074","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W2376591250","https://openalex.org/W2068643782","https://openalex.org/W2142698693","https://openalex.org/W3150743116","https://openalex.org/W2593571787","https://openalex.org/W2921807597","https://openalex.org/W4316660023","https://openalex.org/W1513043666","https://openalex.org/W2907194314","https://openalex.org/W2115623896"],"abstract_inverted_index":{"On-Die":[0],"features":[1],"available":[2],"for":[3,108,176],"validation":[4],"and":[5,31,62,66,115,120,128,151,188],"test":[6],"on":[7,72],"an":[8],"integrated":[9],"circuit":[10,26],"play":[11],"a":[12,28,84,102,134,139,198,210],"major":[13],"role":[14],"in":[15,27,98,132,148,173,180],"evaluating":[16],"the":[17,20,25,39,42,54,64,69,77,94,109,125,149,158,162,167,174,178,181,185,189,192,202,205,213],"performance":[18,65],"of":[19,38,44,56,68,75,79,111,161,184,212],"functionality":[21],"being":[22],"realized":[23],"by":[24],"post-silicon":[29],"environment":[30],"can":[32],"considerably":[33],"reduce":[34],"time":[35],"to":[36,51,60,89,153,165],"market":[37],"end-product.":[40],"In":[41,87],"case":[43],"high-speed":[45,135],"IO,":[46],"it":[47],"is":[48,164,194],"also":[49,195],"important":[50],"note":[52],"that":[53],"type":[55,78],"on-die":[57],"hooks":[58,127,144],"required":[59],"debug":[61,126],"validate":[63],"robustness":[67,179],"design":[70,97],"depend":[71],"several":[73],"factors,":[74],"which":[76],"I/O":[80,96,136],"architecture":[81],"chosen":[82],"plays":[83],"key":[85],"role.":[86],"order":[88],"support":[90],"high":[91],"data":[92],"rates,":[93],"serial":[95],"this":[99],"paper":[100,123,163],"implements":[101],"receiver":[103],"with":[104,197,209],"adaptive":[105,186],"equalization":[106],"engine":[107],"compensation":[110],"inter-symbol":[112],"interference":[113],"(ISI)":[114],"real-time":[116],"environmental":[117],"changes":[118],"(temperature":[119],"voltage).":[121],"This":[122],"describes":[124],"their":[129],"usage":[130],"models":[131],"such":[133],"designed":[137],"using":[138],"32nm":[140],"CMOS":[141],"process.":[142],"These":[143],"have":[145],"been":[146],"tested":[147],"lab":[150,175],"proven":[152],"be":[154],"very":[155],"useful.":[156],"While":[157],"main":[159],"focus":[160],"describe":[166],"hooks,":[168],"how":[169],"they":[170],"are":[171],"used":[172],"observing":[177],"dynamic":[182],"behavior":[183,207],"loops":[187,206,214],"measurement":[190],"results;":[191],"reader":[193],"provided":[196],"brief":[199],"insight":[200],"into":[201],"equations":[203],"describing":[204],"together":[208],"description":[211],"implementation":[215],"details.":[216]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}