{"id":"https://openalex.org/W2091284394","doi":"https://doi.org/10.1109/test.2009.5355631","title":"Power scan: DFT for power switches in VLSI designs","display_name":"Power scan: DFT for power switches in VLSI designs","publication_year":2009,"publication_date":"2009-11-01","ids":{"openalex":"https://openalex.org/W2091284394","doi":"https://doi.org/10.1109/test.2009.5355631","mag":"2091284394"},"language":"en","primary_location":{"id":"doi:10.1109/test.2009.5355631","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2009.5355631","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 International Test Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5026657614","display_name":"Bing-Chuan Bai","orcid":"https://orcid.org/0000-0001-6961-2898"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Bing-Chuan Bai","raw_affiliation_strings":["Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, R. O. C","Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, 10617, R. O. C"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, R. O. C","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, 10617, R. O. C","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071780946","display_name":"Chien-Mo Li","orcid":null},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chien-Mo Li","raw_affiliation_strings":["Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, R. O. C","Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, 10617, R. O. C"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, R. O. C","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, 10617, R. O. C","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062790231","display_name":"Augusli Kifli","orcid":null},"institutions":[{"id":"https://openalex.org/I4210112000","display_name":"Faraday Technology (Taiwan)","ror":"https://ror.org/021wyrx76","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210112000"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Augusli Kifli","raw_affiliation_strings":["Desisgn Development Division, Faraday Technology Corporation, Hsinchu, Taiwan, R. O. C","Design Development Division, Faraday Technology Corporation, Hsinchu, Taiwan 30078, R. O. C"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Desisgn Development Division, Faraday Technology Corporation, Hsinchu, Taiwan, R. O. C","institution_ids":["https://openalex.org/I4210112000"]},{"raw_affiliation_string":"Design Development Division, Faraday Technology Corporation, Hsinchu, Taiwan 30078, R. O. C","institution_ids":["https://openalex.org/I4210112000"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111863728","display_name":"Even Tsai","orcid":null},"institutions":[{"id":"https://openalex.org/I4210112000","display_name":"Faraday Technology (Taiwan)","ror":"https://ror.org/021wyrx76","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210112000"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Even Tsai","raw_affiliation_strings":["Desisgn Development Division, Faraday Technology Corporation, Hsinchu, Taiwan, R. O. C","Design Development Division, Faraday Technology Corporation, Hsinchu, Taiwan 30078, R. O. C"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Desisgn Development Division, Faraday Technology Corporation, Hsinchu, Taiwan, R. O. C","institution_ids":["https://openalex.org/I4210112000"]},{"raw_affiliation_string":"Design Development Division, Faraday Technology Corporation, Hsinchu, Taiwan 30078, R. O. C","institution_ids":["https://openalex.org/I4210112000"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101151658","display_name":"Kun-cheng Wu","orcid":null},"institutions":[{"id":"https://openalex.org/I4210112000","display_name":"Faraday Technology (Taiwan)","ror":"https://ror.org/021wyrx76","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210112000"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Kun-Cheng Wu","raw_affiliation_strings":["Desisgn Development Division, Faraday Technology Corporation, Hsinchu, Taiwan, R. O. C","Design Development Division, Faraday Technology Corporation, Hsinchu, Taiwan 30078, R. O. C"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Desisgn Development Division, Faraday Technology Corporation, Hsinchu, Taiwan, R. O. C","institution_ids":["https://openalex.org/I4210112000"]},{"raw_affiliation_string":"Design Development Division, Faraday Technology Corporation, Hsinchu, Taiwan 30078, R. O. C","institution_ids":["https://openalex.org/I4210112000"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.12231376,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"1"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12495","display_name":"Electrostatic Discharge in Electronics","score":0.9937000274658203,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.7766658067703247},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.671645998954773},{"id":"https://openalex.org/keywords/power-network-design","display_name":"Power network design","score":0.6465303897857666},{"id":"https://openalex.org/keywords/testability","display_name":"Testability","score":0.6300171613693237},{"id":"https://openalex.org/keywords/sleep-mode","display_name":"Sleep mode","score":0.561710000038147},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5289903879165649},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.524461030960083},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.46666401624679565},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.45417118072509766},{"id":"https://openalex.org/keywords/power-gating","display_name":"Power gating","score":0.45262664556503296},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.44036489725112915},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3548947274684906},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.33463597297668457},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2623663544654846},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.21883201599121094},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.19896063208580017},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.16614383459091187},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.14592409133911133},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.06939280033111572}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.7766658067703247},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.671645998954773},{"id":"https://openalex.org/C164565468","wikidata":"https://www.wikidata.org/wiki/Q7236535","display_name":"Power network design","level":3,"score":0.6465303897857666},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.6300171613693237},{"id":"https://openalex.org/C57149124","wikidata":"https://www.wikidata.org/wiki/Q587346","display_name":"Sleep mode","level":4,"score":0.561710000038147},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5289903879165649},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.524461030960083},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.46666401624679565},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.45417118072509766},{"id":"https://openalex.org/C2780700455","wikidata":"https://www.wikidata.org/wiki/Q7236515","display_name":"Power gating","level":4,"score":0.45262664556503296},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.44036489725112915},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3548947274684906},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.33463597297668457},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2623663544654846},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.21883201599121094},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.19896063208580017},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.16614383459091187},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.14592409133911133},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.06939280033111572},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/test.2009.5355631","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2009.5355631","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 International Test Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8700000047683716,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2125647168","https://openalex.org/W2018816676","https://openalex.org/W2109343975","https://openalex.org/W2021918087","https://openalex.org/W2324305405","https://openalex.org/W2139542266","https://openalex.org/W2017695087","https://openalex.org/W2046826624","https://openalex.org/W574669072","https://openalex.org/W3208532083"],"abstract_inverted_index":{"This":[0],"poster":[1],"presents":[2],"Power":[3,27],"Scan,":[4],"a":[5],"design-for-testability":[6],"for":[7],"power":[8],"switches":[9],"in":[10,17,24],"VLSI":[11],"designs.":[12],"It":[13],"measures":[14],"IR":[15],"drop":[16],"function":[18],"mode":[19],"and":[20],"detects":[21],"leakage":[22],"current":[23],"sleep":[25],"mode.":[26],"Scan":[28],"reduces":[29],"the":[30,34],"test":[31],"cost":[32],"at":[33],"price":[35],"of":[36],"small":[37],"area":[38],"overhead.":[39]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}