{"id":"https://openalex.org/W2084730210","doi":"https://doi.org/10.1109/test.2008.4700564","title":"On-chip Programmable Capture for Accurate Path Delay Test and Characterization","display_name":"On-chip Programmable Capture for Accurate Path Delay Test and Characterization","publication_year":2008,"publication_date":"2008-10-01","ids":{"openalex":"https://openalex.org/W2084730210","doi":"https://doi.org/10.1109/test.2008.4700564","mag":"2084730210"},"language":"en","primary_location":{"id":"doi:10.1109/test.2008.4700564","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2008.4700564","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Test Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004217288","display_name":"Rajeshwary Tayade","orcid":null},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"R. Tayade","raw_affiliation_strings":["University of Technology, Austin, USA","University of Texas Austin, TX"],"affiliations":[{"raw_affiliation_string":"University of Technology, Austin, USA","institution_ids":["https://openalex.org/I86519309"]},{"raw_affiliation_string":"University of Texas Austin, TX","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068070739","display_name":"Jacob A. Abraham","orcid":"https://orcid.org/0000-0002-5336-5631"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J.A. Abraham","raw_affiliation_strings":["University of Technology, Austin, USA","University of Texas Austin, TX"],"affiliations":[{"raw_affiliation_string":"University of Technology, Austin, USA","institution_ids":["https://openalex.org/I86519309"]},{"raw_affiliation_string":"University of Texas Austin, TX","institution_ids":["https://openalex.org/I86519309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5004217288"],"corresponding_institution_ids":["https://openalex.org/I86519309"],"apc_list":null,"apc_paid":null,"fwci":3.1195,"has_fulltext":false,"cited_by_count":43,"citation_normalized_percentile":{"value":0.91952322,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6616118550300598},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.6449285745620728},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.6253232955932617},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.4943125247955322},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.47780901193618774},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4632408022880554},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.4473355710506439},{"id":"https://openalex.org/keywords/device-under-test","display_name":"Device under test","score":0.42998629808425903},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4127543568611145},{"id":"https://openalex.org/keywords/test-compression","display_name":"Test compression","score":0.4119178056716919},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.37915948033332825},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18107417225837708},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.14147993922233582},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.13787150382995605},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09523823857307434}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6616118550300598},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.6449285745620728},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.6253232955932617},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.4943125247955322},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.47780901193618774},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4632408022880554},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.4473355710506439},{"id":"https://openalex.org/C76249512","wikidata":"https://www.wikidata.org/wiki/Q1206780","display_name":"Device under test","level":3,"score":0.42998629808425903},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4127543568611145},{"id":"https://openalex.org/C29652920","wikidata":"https://www.wikidata.org/wiki/Q7705757","display_name":"Test compression","level":4,"score":0.4119178056716919},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.37915948033332825},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18107417225837708},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.14147993922233582},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.13787150382995605},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09523823857307434},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C44838205","wikidata":"https://www.wikidata.org/wiki/Q127995","display_name":"Microwave","level":2,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/test.2008.4700564","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2008.4700564","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Test Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1908034516","https://openalex.org/W1967835630","https://openalex.org/W1994241124","https://openalex.org/W2007068450","https://openalex.org/W2097410912","https://openalex.org/W2098171066","https://openalex.org/W2106588126","https://openalex.org/W2119826888","https://openalex.org/W2123145598","https://openalex.org/W2124407221","https://openalex.org/W2140980952","https://openalex.org/W2144573344","https://openalex.org/W2161329778"],"related_works":["https://openalex.org/W4285708951","https://openalex.org/W2147986372","https://openalex.org/W2786111245","https://openalex.org/W1979305473","https://openalex.org/W3009953521","https://openalex.org/W4234763172","https://openalex.org/W2125317684","https://openalex.org/W2570882127","https://openalex.org/W2323083271","https://openalex.org/W2992024382"],"abstract_inverted_index":{"The":[0,42,88],"increasing":[1],"gap":[2],"between":[3],"modern":[4],"chip":[5],"frequencies":[6,10],"and":[7,97,100],"test":[8,14,43,54,58,86,111],"clock":[9,44,59],"provided":[11],"by":[12],"external":[13],"equipment,":[15],"makes":[16],"at-speed":[17,40],"delay":[18,79,110],"testing":[19],"a":[20,24,29,50],"challenge.":[21],"We":[22],"present":[23],"novel":[25],"technique":[26,89],"to":[27,69],"generate":[28],"capture":[30],"signal":[31],"on-chip,":[32],"with":[33],"programmable":[34],"delay,":[35],"which":[36,81],"enables":[37],"faster":[38],"than":[39],"test.":[41],"frequency":[45,60],"can":[46,61,101],"be":[47,62,102],"programmed":[48],"as":[49],"part":[51],"of":[52,95],"the":[53,73,106],"vector":[55],"itself.":[56],"Since":[57],"controlled,":[63],"it":[64],"is":[65],"no":[66],"longer":[67],"required":[68],"depend":[70],"only":[71],"on":[72],"long":[74],"paths":[75],"for":[76],"detecting":[77],"small":[78],"defects,":[80],"provides":[82],"flexibility":[83],"in":[84,93],"selecting":[85],"paths.":[87],"has":[90],"minimal":[91],"overhead":[92],"terms":[94],"area":[96],"design":[98],"effort":[99],"easily":[103],"incorporated":[104],"into":[105],"current":[107],"scan":[108],"based":[109],"methods.":[112]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":4},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":5},{"year":2014,"cited_by_count":4},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}