{"id":"https://openalex.org/W2128662029","doi":"https://doi.org/10.1109/test.2007.4437697","title":"How to ensure zero defects from the beginning with semiconductor test methods","display_name":"How to ensure zero defects from the beginning with semiconductor test methods","publication_year":2007,"publication_date":"2007-01-01","ids":{"openalex":"https://openalex.org/W2128662029","doi":"https://doi.org/10.1109/test.2007.4437697","mag":"2128662029"},"language":"en","primary_location":{"id":"doi:10.1109/test.2007.4437697","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2007.4437697","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IEEE International Test Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Bernd Gessner","orcid":null},"institutions":[{"id":"https://openalex.org/I4210139527","display_name":"AMS (Slovenia)","ror":"https://ror.org/033eygk88","country_code":"SI","type":"company","lineage":["https://openalex.org/I154481106","https://openalex.org/I4210139527"]}],"countries":["SI"],"is_corresponding":true,"raw_author_name":"Bernd Gessner","raw_affiliation_strings":["Austria Microsystems AG, Graz, Austria","Austriamicrosystems AG, Graz"],"affiliations":[{"raw_affiliation_string":"Austria Microsystems AG, Graz, Austria","institution_ids":[]},{"raw_affiliation_string":"Austriamicrosystems AG, Graz","institution_ids":["https://openalex.org/I4210139527"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4210139527"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.16108205,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"2"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10624","display_name":"Silicon and Solar Cell Technologies","score":0.9850000143051147,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.7620404958724976},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.7542291879653931},{"id":"https://openalex.org/keywords/zero","display_name":"Zero (linguistics)","score":0.6143160462379456},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.575681209564209},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5659794211387634},{"id":"https://openalex.org/keywords/product","display_name":"Product (mathematics)","score":0.5572733879089355},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.5185990333557129},{"id":"https://openalex.org/keywords/circuit-reliability","display_name":"Circuit reliability","score":0.43092525005340576},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.31513240933418274},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.09022769331932068}],"concepts":[{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.7620404958724976},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.7542291879653931},{"id":"https://openalex.org/C2780813799","wikidata":"https://www.wikidata.org/wiki/Q3274237","display_name":"Zero (linguistics)","level":2,"score":0.6143160462379456},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.575681209564209},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5659794211387634},{"id":"https://openalex.org/C90673727","wikidata":"https://www.wikidata.org/wiki/Q901718","display_name":"Product (mathematics)","level":2,"score":0.5572733879089355},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.5185990333557129},{"id":"https://openalex.org/C2778309119","wikidata":"https://www.wikidata.org/wiki/Q5121614","display_name":"Circuit reliability","level":4,"score":0.43092525005340576},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.31513240933418274},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.09022769331932068},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/test.2007.4437697","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2007.4437697","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IEEE International Test Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.5400000214576721,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W4360585747","https://openalex.org/W2151793089","https://openalex.org/W1976621533","https://openalex.org/W2104898937","https://openalex.org/W1974247072","https://openalex.org/W1988197221","https://openalex.org/W2539002698","https://openalex.org/W2135610295","https://openalex.org/W244215876","https://openalex.org/W2391026314"],"abstract_inverted_index":{"Today,":[0],"reliability":[1,44,55],"of":[2,37,45,56,86],"electronic":[3],"products":[4],"is":[5,35,97],"considered":[6],"as":[7,27],"the":[8,13,24,28,38,43,46,54,67,77,87,90,93],"minimum":[9],"requirement":[10],"to":[11,41,51,76],"ensure":[12,42],"functionality":[14],"in":[15],"a":[16],"safe":[17],"and":[18,65,92],"reliable":[19],"way":[20],"over":[21,70],"years.":[22],"From":[23],"semiconductor":[25],"sector,":[26],"provider":[29],"from":[30,74],"high-integrated":[31],"circuits,":[32],"this":[33,63,82],"trend,":[34],"one":[36],"main":[39],"challenges":[40],"product,":[47],"but":[48],"much":[49],"more":[50],"precisely":[52],"predict":[53],"those":[57],"products.":[58],"austriamicrosystems":[59],"very":[60],"early":[61],"recognized":[62],"trend":[64],"implemented":[66],"zero-defect":[68,88],"program":[69,89],"all":[71],"process":[72],"steps":[73],"design":[75],"end-of-the-life":[78],"their":[79],"product.":[80],"In":[81],"paper":[83],"an":[84],"overview":[85],"achievements":[91],"methods":[94],"are":[95],"described":[96],"shown.":[98]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-04-17T18:11:37.981687","created_date":"2025-10-10T00:00:00"}