{"id":"https://openalex.org/W2126274875","doi":"https://doi.org/10.1109/test.2007.4437566","title":"Advancements in at-speed array BIST: multiple improvements","display_name":"Advancements in at-speed array BIST: multiple improvements","publication_year":2007,"publication_date":"2007-01-01","ids":{"openalex":"https://openalex.org/W2126274875","doi":"https://doi.org/10.1109/test.2007.4437566","mag":"2126274875"},"language":"en","primary_location":{"id":"doi:10.1109/test.2007.4437566","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2007.4437566","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IEEE International Test Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006687090","display_name":"Kevin Gorman","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]},{"id":"https://openalex.org/I4210134083","display_name":"Essex Westford School District","ror":"https://ror.org/03ze2q110","country_code":"US","type":"education","lineage":["https://openalex.org/I4210134083"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kevin Gorman","raw_affiliation_strings":["Essex Junction, IBM, VT, USA","IBM, Essex Junction, VT#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Essex Junction, IBM, VT, USA","institution_ids":["https://openalex.org/I4210134083"]},{"raw_affiliation_string":"IBM, Essex Junction, VT#TAB#","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027701683","display_name":"Michael Roberge","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]},{"id":"https://openalex.org/I4210134083","display_name":"Essex Westford School District","ror":"https://ror.org/03ze2q110","country_code":"US","type":"education","lineage":["https://openalex.org/I4210134083"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Michael Roberge","raw_affiliation_strings":["Essex Junction, IBM, VT, USA","IBM, Essex Junction, VT#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Essex Junction, IBM, VT, USA","institution_ids":["https://openalex.org/I4210134083"]},{"raw_affiliation_string":"IBM, Essex Junction, VT#TAB#","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058597377","display_name":"Adrian Paparelli","orcid":"https://orcid.org/0000-0002-9911-8126"},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]},{"id":"https://openalex.org/I4210134083","display_name":"Essex Westford School District","ror":"https://ror.org/03ze2q110","country_code":"US","type":"education","lineage":["https://openalex.org/I4210134083"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Adrian Paparelli","raw_affiliation_strings":["Essex Junction, IBM, VT, USA","IBM, Essex Junction, VT#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Essex Junction, IBM, VT, USA","institution_ids":["https://openalex.org/I4210134083"]},{"raw_affiliation_string":"IBM, Essex Junction, VT#TAB#","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060281934","display_name":"Gary Pomichter","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]},{"id":"https://openalex.org/I4210134083","display_name":"Essex Westford School District","ror":"https://ror.org/03ze2q110","country_code":"US","type":"education","lineage":["https://openalex.org/I4210134083"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Gary Pomichter","raw_affiliation_strings":["Essex Junction, IBM, VT, USA","IBM, Essex Junction, VT#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Essex Junction, IBM, VT, USA","institution_ids":["https://openalex.org/I4210134083"]},{"raw_affiliation_string":"IBM, Essex Junction, VT#TAB#","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034307622","display_name":"Stephen Sliva","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]},{"id":"https://openalex.org/I4210134083","display_name":"Essex Westford School District","ror":"https://ror.org/03ze2q110","country_code":"US","type":"education","lineage":["https://openalex.org/I4210134083"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Stephen Sliva","raw_affiliation_strings":["Essex Junction, IBM, VT, USA","IBM, Essex Junction, VT#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Essex Junction, IBM, VT, USA","institution_ids":["https://openalex.org/I4210134083"]},{"raw_affiliation_string":"IBM, Essex Junction, VT#TAB#","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5041359127","display_name":"William Corbin","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]},{"id":"https://openalex.org/I4210134083","display_name":"Essex Westford School District","ror":"https://ror.org/03ze2q110","country_code":"US","type":"education","lineage":["https://openalex.org/I4210134083"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"William Corbin","raw_affiliation_strings":["Essex Junction, IBM, VT, USA","IBM, Essex Junction, VT#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Essex Junction, IBM, VT, USA","institution_ids":["https://openalex.org/I4210134083"]},{"raw_affiliation_string":"IBM, Essex Junction, VT#TAB#","institution_ids":["https://openalex.org/I1341412227"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.13225591,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"10"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.6800888180732727},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.6770975589752197},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.6543168425559998},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6256694793701172},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4902053475379944},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.44767794013023376},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.44262614846229553},{"id":"https://openalex.org/keywords/multiplication","display_name":"Multiplication (music)","score":0.42764484882354736},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.4271070957183838},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.38802000880241394},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3399586081504822},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3342400789260864},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.31642210483551025},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2615721821784973},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.13239553570747375},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07317927479743958}],"concepts":[{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.6800888180732727},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.6770975589752197},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.6543168425559998},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6256694793701172},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4902053475379944},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.44767794013023376},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.44262614846229553},{"id":"https://openalex.org/C2780595030","wikidata":"https://www.wikidata.org/wiki/Q3860309","display_name":"Multiplication (music)","level":2,"score":0.42764484882354736},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.4271070957183838},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.38802000880241394},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3399586081504822},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3342400789260864},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.31642210483551025},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2615721821784973},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.13239553570747375},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07317927479743958},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C24890656","wikidata":"https://www.wikidata.org/wiki/Q82811","display_name":"Acoustics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/test.2007.4437566","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2007.4437566","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IEEE International Test Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.41999998688697815}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1501552401","https://openalex.org/W1579286012","https://openalex.org/W1979844712","https://openalex.org/W1980063930","https://openalex.org/W1999781385","https://openalex.org/W2020281332","https://openalex.org/W2051995230","https://openalex.org/W2052075243","https://openalex.org/W2070413034","https://openalex.org/W2103344295","https://openalex.org/W2110628909","https://openalex.org/W2123106302","https://openalex.org/W2130183347","https://openalex.org/W2155599474","https://openalex.org/W2158626904","https://openalex.org/W2159253302","https://openalex.org/W2533651815","https://openalex.org/W2917224946","https://openalex.org/W2989159162","https://openalex.org/W4232106025"],"related_works":["https://openalex.org/W2433923775","https://openalex.org/W4327926368","https://openalex.org/W3130092517","https://openalex.org/W2767807890","https://openalex.org/W2582197177","https://openalex.org/W2735358362","https://openalex.org/W2792968370","https://openalex.org/W3015923041","https://openalex.org/W2104478015","https://openalex.org/W4230343699"],"abstract_inverted_index":{"This":[0],"paper":[1],"discusses":[2],"the":[3,103],"unique":[4],"challenges":[5],"in":[6,21,39,72],"constructing":[7],"an":[8,22],"architecture":[9],"and":[10,33,68,102,111],"methodology":[11],"for":[12,91],"testing":[13],"a":[14,98],"1":[15],"GHz":[16],"65":[17],"nm":[18],"Embedded":[19],"DRAM":[20],"ASIC":[23],"environment.":[24],"The":[25,41,50],"concepts":[26],"of":[27,29,44,53],"multiplication":[28,46],"both":[30],"test":[31,34,63,94,109,112],"commands":[32],"clock":[35,95],"frequency":[36],"are":[37],"discussed":[38],"detail.":[40],"novel":[42],"technique":[43],"command":[45],"is":[47,57,84],"thoroughly":[48],"explored.":[49],"inherent":[51],"benefits":[52],"this":[54,106],"design":[55],"point":[56],"examined":[58],"as":[59],"it":[60],"relates":[61],"to":[62,74,87],"circuit":[64],"design,":[65],"BIST":[66,81],"sharing,":[67],"chip":[69],"level":[70],"wiring":[71],"comparison":[73],"traditional":[75],"scan":[76],"or":[77],"parallel":[78],"based":[79],"array":[80],"architectures.":[82],"Attention":[83],"also":[85],"paid":[86],"various":[88],"methods":[89],"used":[90],"supporting":[92],"at-speed/high-speed":[93],"generation":[96],"from":[97],"low":[99],"speed":[100],"tester":[101],"important":[104],"influence":[105],"has":[107],"on":[108],"cost":[110],"quality.":[113]},"counts_by_year":[{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
