{"id":"https://openalex.org/W2138849113","doi":"https://doi.org/10.1109/test.2005.1583986","title":"Microprocessor silicon debug based on failure propagation tracing","display_name":"Microprocessor silicon debug based on failure propagation tracing","publication_year":2006,"publication_date":"2006-02-06","ids":{"openalex":"https://openalex.org/W2138849113","doi":"https://doi.org/10.1109/test.2005.1583986","mag":"2138849113"},"language":"en","primary_location":{"id":"doi:10.1109/test.2005.1583986","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2005.1583986","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE International Conference on Test, 2005.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5000996996","display_name":"O. Caty","orcid":null},"institutions":[{"id":"https://openalex.org/I1342911587","display_name":"Oracle (United States)","ror":"https://ror.org/006c77m33","country_code":"US","type":"company","lineage":["https://openalex.org/I1342911587"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"O. Caty","raw_affiliation_strings":["Sun Microsystems, Inc., Sunnyvale, USA","Sun Microsystems, Inc, Sunnyvale, CA#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Sun Microsystems, Inc., Sunnyvale, USA","institution_ids":[]},{"raw_affiliation_string":"Sun Microsystems, Inc, Sunnyvale, CA#TAB#","institution_ids":["https://openalex.org/I1342911587"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074482626","display_name":"Peter Dahlgren","orcid":"https://orcid.org/0000-0002-3509-3329"},"institutions":[{"id":"https://openalex.org/I1342911587","display_name":"Oracle (United States)","ror":"https://ror.org/006c77m33","country_code":"US","type":"company","lineage":["https://openalex.org/I1342911587"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"P. Dahlgren","raw_affiliation_strings":["Sun Microsystems, Inc., Sunnyvale, USA","Sun Microsystems, Inc, Sunnyvale, CA#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Sun Microsystems, Inc., Sunnyvale, USA","institution_ids":[]},{"raw_affiliation_string":"Sun Microsystems, Inc, Sunnyvale, CA#TAB#","institution_ids":["https://openalex.org/I1342911587"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5024209595","display_name":"I. Bayraktaroglu","orcid":null},"institutions":[{"id":"https://openalex.org/I1342911587","display_name":"Oracle (United States)","ror":"https://ror.org/006c77m33","country_code":"US","type":"company","lineage":["https://openalex.org/I1342911587"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"I. Bayraktaroglu","raw_affiliation_strings":["Sun Microsystems, Inc., Sunnyvale, USA","Sun Microsystems, Inc, Sunnyvale, CA#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Sun Microsystems, Inc., Sunnyvale, USA","institution_ids":[]},{"raw_affiliation_string":"Sun Microsystems, Inc, Sunnyvale, CA#TAB#","institution_ids":["https://openalex.org/I1342911587"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":5.407,"has_fulltext":false,"cited_by_count":60,"citation_normalized_percentile":{"value":0.96165192,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"284","last_page":"293"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.8530234098434448},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.7062155604362488},{"id":"https://openalex.org/keywords/tracing","display_name":"Tracing","score":0.6754822134971619},{"id":"https://openalex.org/keywords/root-cause","display_name":"Root cause","score":0.6721818447113037},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6581141352653503},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.5689065456390381},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5215911269187927},{"id":"https://openalex.org/keywords/time-to-market","display_name":"Time to market","score":0.4364791810512543},{"id":"https://openalex.org/keywords/root-cause-analysis","display_name":"Root cause analysis","score":0.42287909984588623},{"id":"https://openalex.org/keywords/software-bug","display_name":"Software bug","score":0.412923127412796},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24579626321792603},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2434101700782776},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.22389250993728638}],"concepts":[{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.8530234098434448},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.7062155604362488},{"id":"https://openalex.org/C138673069","wikidata":"https://www.wikidata.org/wiki/Q322229","display_name":"Tracing","level":2,"score":0.6754822134971619},{"id":"https://openalex.org/C84945661","wikidata":"https://www.wikidata.org/wiki/Q7366567","display_name":"Root cause","level":2,"score":0.6721818447113037},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6581141352653503},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.5689065456390381},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5215911269187927},{"id":"https://openalex.org/C2779229675","wikidata":"https://www.wikidata.org/wiki/Q445235","display_name":"Time to market","level":2,"score":0.4364791810512543},{"id":"https://openalex.org/C130963320","wikidata":"https://www.wikidata.org/wiki/Q1401207","display_name":"Root cause analysis","level":2,"score":0.42287909984588623},{"id":"https://openalex.org/C1009929","wikidata":"https://www.wikidata.org/wiki/Q179550","display_name":"Software bug","level":3,"score":0.412923127412796},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24579626321792603},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2434101700782776},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.22389250993728638}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/test.2005.1583986","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2005.1583986","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE International Conference on Test, 2005.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.4699999988079071}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1585435930","https://openalex.org/W1881765175","https://openalex.org/W1933373060","https://openalex.org/W2119677575","https://openalex.org/W2125094702","https://openalex.org/W2140891446","https://openalex.org/W2143535677","https://openalex.org/W2145314233","https://openalex.org/W2146210365"],"related_works":["https://openalex.org/W2030594396","https://openalex.org/W2754538212","https://openalex.org/W2490884653","https://openalex.org/W4200610016","https://openalex.org/W2183996497","https://openalex.org/W129587375","https://openalex.org/W2110363179","https://openalex.org/W2056250485","https://openalex.org/W2535098331","https://openalex.org/W4255366506"],"abstract_inverted_index":{"As":[0],"the":[1,6,16,28,35,55,61],"complexity":[2],"of":[3,31,38],"microprocessors":[4],"increases,":[5],"design":[7,56],"and":[8],"bring-up":[9],"times":[10],"have":[11],"significantly":[12],"increased,":[13],"negatively":[14],"impacting":[15],"time-to-market":[17],"(TTM)":[18],"requirements.":[19],"In":[20],"this":[21],"paper,":[22],"a":[23,45],"backtracing":[24],"methodology":[25,49],"for":[26,72],"identifying":[27],"root":[29],"cause":[30],"functional":[32],"failures":[33],"on":[34],"UltraSPARCtrade":[36],"family":[37],"processors":[39],"is":[40,50],"presented.":[41],"Data":[42],"provided":[43],"by":[44],"scan":[46],"dump":[47],"analysis":[48,74],"linked":[51],"not":[52],"only":[53],"to":[54,60,66],"database":[57],"but":[58],"also":[59],"failing":[62],"test":[63],"in":[64],"order":[65],"isolate":[67],"one":[68],"or":[69],"several":[70],"candidates":[71],"further":[73]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":2},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":8}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
