{"id":"https://openalex.org/W2158254213","doi":"https://doi.org/10.1109/test.2004.1387361","title":"Controlled sine wave fitting for ADC test","display_name":"Controlled sine wave fitting for ADC test","publication_year":2005,"publication_date":"2005-03-21","ids":{"openalex":"https://openalex.org/W2158254213","doi":"https://doi.org/10.1109/test.2004.1387361","mag":"2158254213"},"language":"en","primary_location":{"id":"doi:10.1109/test.2004.1387361","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2004.1387361","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2004 International Conferce on Test","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5075698960","display_name":"Heinz Mattes","orcid":null},"institutions":[{"id":"https://openalex.org/I137594350","display_name":"Infineon Technologies (Germany)","ror":"https://ror.org/005kw6t15","country_code":"DE","type":"company","lineage":["https://openalex.org/I137594350"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"H. Mattes","raw_affiliation_strings":["Infineon Technologies, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Infineon Technologies, Munich, Germany","institution_ids":["https://openalex.org/I137594350"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015506172","display_name":"Sebastian Sattler","orcid":"https://orcid.org/0000-0002-6491-0754"},"institutions":[{"id":"https://openalex.org/I137594350","display_name":"Infineon Technologies (Germany)","ror":"https://ror.org/005kw6t15","country_code":"DE","type":"company","lineage":["https://openalex.org/I137594350"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"S. Sattler","raw_affiliation_strings":["Infineon Technologies, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Infineon Technologies, Munich, Germany","institution_ids":["https://openalex.org/I137594350"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5037820284","display_name":"C. Dworski","orcid":null},"institutions":[{"id":"https://openalex.org/I4210131793","display_name":"Infineon Technologies (Austria)","ror":"https://ror.org/03msng824","country_code":"AT","type":"company","lineage":["https://openalex.org/I137594350","https://openalex.org/I4210131793"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"C. Dworski","raw_affiliation_strings":["Infineon Technologies, Villach, Austria"],"affiliations":[{"raw_affiliation_string":"Infineon Technologies, Villach, Austria","institution_ids":["https://openalex.org/I4210131793"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5075698960"],"corresponding_institution_ids":["https://openalex.org/I137594350"],"apc_list":null,"apc_paid":null,"fwci":2.0625,"has_fulltext":false,"cited_by_count":26,"citation_normalized_percentile":{"value":0.87744473,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"963","last_page":"971"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.740689218044281},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6864767670631409},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6343287825584412},{"id":"https://openalex.org/keywords/correctness","display_name":"Correctness","score":0.6237592101097107},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.5252237319946289},{"id":"https://openalex.org/keywords/realization","display_name":"Realization (probability)","score":0.48041653633117676},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.45608752965927124},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3673323392868042},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3407006561756134},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.27564507722854614},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18649956583976746},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.12772178649902344}],"concepts":[{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.740689218044281},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6864767670631409},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6343287825584412},{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.6237592101097107},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.5252237319946289},{"id":"https://openalex.org/C2781089630","wikidata":"https://www.wikidata.org/wiki/Q21856745","display_name":"Realization (probability)","level":2,"score":0.48041653633117676},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.45608752965927124},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3673323392868042},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3407006561756134},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.27564507722854614},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18649956583976746},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.12772178649902344},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/test.2004.1387361","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2004.1387361","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2004 International Conferce on Test","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320321114","display_name":"Bundesministerium f\u00fcr Bildung und Forschung","ror":"https://ror.org/04pz7b180"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1501573324","https://openalex.org/W2005336149","https://openalex.org/W2124517079","https://openalex.org/W2124912253","https://openalex.org/W2146116573","https://openalex.org/W2537264164","https://openalex.org/W6630035370","https://openalex.org/W6678799032"],"related_works":["https://openalex.org/W1667647204","https://openalex.org/W3004362061","https://openalex.org/W4297665406","https://openalex.org/W2364622490","https://openalex.org/W2042515040","https://openalex.org/W2383986884","https://openalex.org/W2356141508","https://openalex.org/W2749962643","https://openalex.org/W2390807153","https://openalex.org/W2538906952"],"abstract_inverted_index":{"We":[0],"introduce":[1],"a":[2,25,58,63,88,110,128,141,163,187,204],"novel":[3],"procedure":[4,156],"for":[5,52,115,172],"testing":[6],"the":[7,20,32,37,50,69,79,82,97,100,131,144,152,155,167,175,184,198,210,213],"dynamic":[8],"parameters":[9,38],"of":[10,19,36,68,81,99,133,154,166,169,212],"analog":[11],"to":[12,72,78,87,95,107,127,197,217],"digital":[13],"converters":[14],"(ADC).":[15],"The":[16,34,47,122],"test":[17,74,101,123],"response":[18],"ADC":[21],"is":[22,29,39,136,215],"compared":[23,77],"with":[24],"reference":[26],"signal":[27,65],"which":[28,195],"supplied":[30],"by":[31,159],"tester.":[33],"evaluation":[35],"done":[40],"in":[41,44,180],"time":[42,75,124],"domain":[43],"real":[45],"time.":[46],"method":[48,214],"has":[49],"potential":[51],"being":[53],"very":[54],"advantageously":[55],"implemented":[56],"as":[57,103,105],"built-in":[59],"self-test":[60],"(BIST)":[61],"into":[62],"mixed":[64],"circuit.":[66],"Goal":[67],"development":[70],"was":[71,94,125,146,157,178,193],"reduce":[73],"significantly":[76],"state":[80],"art":[83],"methods.":[84,220],"With":[85],"regard":[86],"BIST":[89],"solution":[90],"another":[91],"essential":[92],"requirement":[93],"keep":[96],"complexity":[98],"circuitry":[102],"low":[104],"possible,":[106],"get":[108,162],"only":[109],"small":[111],"additional":[112],"chip":[113],"area":[114],"realization.":[116],"Both":[117],"goals":[118],"were":[119],"reached":[120],"successfully.":[121],"reduced":[126],"quarter":[129],"and":[130,151],"number":[132,168],"gates":[134,170],"needed":[135],"smaller":[137],"than":[138],"6,700.":[139],"In":[140],"first":[142],"step":[143],"algorithm":[145],"modeled":[147],"at":[148],"system":[149],"level":[150],"correctness":[153],"proven":[158],"simulations.":[160],"To":[161],"reliable":[164],"estimation":[165],"necessary":[171],"an":[173],"implementation,":[174],"optimized":[176],"model":[177],"redesigned":[179],"VHDL.":[181],"Based":[182],"on":[183,203],"VHDL":[185],"code":[186],"field":[188],"programmable":[189],"gate":[190,199],"array":[191],"(FPGA)":[192],"configured":[194],"led":[196],"count":[200],"estimation.":[201],"Measurements":[202],"Teradyne":[205],"J750":[206],"tester":[207],"showed":[208],"that":[209],"accuracy":[211],"equivalent":[216],"FFT":[218],"based":[219]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}