{"id":"https://openalex.org/W2146887273","doi":"https://doi.org/10.1109/test.2004.1387002","title":"Application-dependent diagnosis of FPGAs","display_name":"Application-dependent diagnosis of FPGAs","publication_year":2005,"publication_date":"2005-03-07","ids":{"openalex":"https://openalex.org/W2146887273","doi":"https://doi.org/10.1109/test.2004.1387002","mag":"2146887273"},"language":"en","primary_location":{"id":"doi:10.1109/test.2004.1387002","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2004.1387002","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2004 International Conferce on Test","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5064445713","display_name":"Mehdi B. Tahoori","orcid":"https://orcid.org/0000-0002-8829-5610"},"institutions":[{"id":"https://openalex.org/I12912129","display_name":"Northeastern University","ror":"https://ror.org/04t5xt781","country_code":"US","type":"education","lineage":["https://openalex.org/I12912129"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"M. Baradaran Tahoori","raw_affiliation_strings":["Northeastern University, Boston, MA, USA","Northeastern University Boston MA USA"],"affiliations":[{"raw_affiliation_string":"Northeastern University, Boston, MA, USA","institution_ids":["https://openalex.org/I12912129"]},{"raw_affiliation_string":"Northeastern University Boston MA USA","institution_ids":["https://openalex.org/I12912129"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5064445713"],"corresponding_institution_ids":["https://openalex.org/I12912129"],"apc_list":null,"apc_paid":null,"fwci":2.0625,"has_fulltext":false,"cited_by_count":19,"citation_normalized_percentile":{"value":0.87627551,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"285","issue":null,"first_page":"645","last_page":"654"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8401740789413452},{"id":"https://openalex.org/keywords/bridging","display_name":"Bridging (networking)","score":0.664995551109314},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.6380548477172852},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6343730092048645},{"id":"https://openalex.org/keywords/programmable-logic-array","display_name":"Programmable logic array","score":0.5951922535896301},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.5660628080368042},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5285398364067078},{"id":"https://openalex.org/keywords/programmable-logic-device","display_name":"Programmable logic device","score":0.5197681784629822},{"id":"https://openalex.org/keywords/logarithm","display_name":"Logarithm","score":0.49936795234680176},{"id":"https://openalex.org/keywords/programmable-array-logic","display_name":"Programmable Array Logic","score":0.45052582025527954},{"id":"https://openalex.org/keywords/macrocell-array","display_name":"Macrocell array","score":0.43846771121025085},{"id":"https://openalex.org/keywords/logic-block","display_name":"Logic block","score":0.43612924218177795},{"id":"https://openalex.org/keywords/fault-detection-and-isolation","display_name":"Fault detection and isolation","score":0.42486774921417236},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4184283912181854},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.40765851736068726},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3803871273994446},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3696579337120056},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2959764003753662},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.14398539066314697},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.12230652570724487}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8401740789413452},{"id":"https://openalex.org/C174348530","wikidata":"https://www.wikidata.org/wiki/Q188635","display_name":"Bridging (networking)","level":2,"score":0.664995551109314},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.6380548477172852},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6343730092048645},{"id":"https://openalex.org/C182322920","wikidata":"https://www.wikidata.org/wiki/Q2112217","display_name":"Programmable logic array","level":3,"score":0.5951922535896301},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.5660628080368042},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5285398364067078},{"id":"https://openalex.org/C206274596","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Programmable logic device","level":2,"score":0.5197681784629822},{"id":"https://openalex.org/C39927690","wikidata":"https://www.wikidata.org/wiki/Q11197","display_name":"Logarithm","level":2,"score":0.49936795234680176},{"id":"https://openalex.org/C113323844","wikidata":"https://www.wikidata.org/wiki/Q1378651","display_name":"Programmable Array Logic","level":5,"score":0.45052582025527954},{"id":"https://openalex.org/C142278197","wikidata":"https://www.wikidata.org/wiki/Q4284934","display_name":"Macrocell array","level":5,"score":0.43846771121025085},{"id":"https://openalex.org/C2778325283","wikidata":"https://www.wikidata.org/wiki/Q1125244","display_name":"Logic block","level":3,"score":0.43612924218177795},{"id":"https://openalex.org/C152745839","wikidata":"https://www.wikidata.org/wiki/Q5438153","display_name":"Fault detection and isolation","level":3,"score":0.42486774921417236},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4184283912181854},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.40765851736068726},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3803871273994446},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3696579337120056},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2959764003753662},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.14398539066314697},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.12230652570724487},{"id":"https://openalex.org/C172707124","wikidata":"https://www.wikidata.org/wiki/Q423488","display_name":"Actuator","level":2,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/test.2004.1387002","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2004.1387002","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2004 International Conferce on Test","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/16","score":0.6299999952316284,"display_name":"Peace, Justice and strong institutions"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":42,"referenced_works":["https://openalex.org/W100035992","https://openalex.org/W128123307","https://openalex.org/W155940324","https://openalex.org/W1480045349","https://openalex.org/W1502534336","https://openalex.org/W1524961204","https://openalex.org/W1573539205","https://openalex.org/W1644626461","https://openalex.org/W1914809015","https://openalex.org/W1921192440","https://openalex.org/W1979477906","https://openalex.org/W2033047794","https://openalex.org/W2049650033","https://openalex.org/W2051828314","https://openalex.org/W2095754963","https://openalex.org/W2101978114","https://openalex.org/W2102927569","https://openalex.org/W2108529592","https://openalex.org/W2110493715","https://openalex.org/W2119588320","https://openalex.org/W2119841103","https://openalex.org/W2125719425","https://openalex.org/W2127382553","https://openalex.org/W2136658794","https://openalex.org/W2136841933","https://openalex.org/W2140645577","https://openalex.org/W2147855735","https://openalex.org/W2153887537","https://openalex.org/W2156328961","https://openalex.org/W2156443301","https://openalex.org/W2157009629","https://openalex.org/W2162983760","https://openalex.org/W2163865290","https://openalex.org/W2170564220","https://openalex.org/W2399801569","https://openalex.org/W3142089438","https://openalex.org/W4255434197","https://openalex.org/W4285719527","https://openalex.org/W6606353889","https://openalex.org/W6630040333","https://openalex.org/W6675893498","https://openalex.org/W6684360715"],"related_works":["https://openalex.org/W1528933814","https://openalex.org/W3013792460","https://openalex.org/W3117015220","https://openalex.org/W2480852620","https://openalex.org/W2182398074","https://openalex.org/W2135636985","https://openalex.org/W2246445978","https://openalex.org/W2118828191","https://openalex.org/W4237841534","https://openalex.org/W3023652529"],"abstract_inverted_index":{"A":[0],"new":[1],"technique":[2,34],"for":[3,31,64],"diagnosis":[4,66,78],"of":[5,13,61,72],"faults":[6],"in":[7,45,55,81],"the":[8,46,56,70,73],"interconnects":[9],"and":[10],"logic":[11,57,77],"blocks":[12],"an":[14,19],"arbitrary":[15],"design":[16],"implemented":[17],"on":[18],"FPGA":[20],"is":[21,25,67,79],"presented.":[22],"This":[23,33],"work":[24],"complementary":[26],"to":[27,69],"application-dependent":[28],"detection":[29],"methods":[30],"FPGAs.":[32],"can":[35],"uniquely":[36],"identify":[37],"any":[38,51],"single":[39,52],"bridging,":[40],"open,":[41],"or":[42],"stuck-at":[43],"fault":[44,54],"interconnect":[47,65],"as":[48,50],"well":[49],"functional":[53],"blocks.":[58],"The":[59],"number":[60],"test":[62,84],"configurations":[63],"logarithmic":[68],"size":[71],"mapped":[74],"design,":[75],"whereas":[76],"performed":[80],"only":[82],"one":[83],"configuration.":[85]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}