{"id":"https://openalex.org/W1592824829","doi":"https://doi.org/10.1109/test.2004.1386981","title":"Channel masking synthesis for efficient on-chip test compression","display_name":"Channel masking synthesis for efficient on-chip test compression","publication_year":2005,"publication_date":"2005-03-21","ids":{"openalex":"https://openalex.org/W1592824829","doi":"https://doi.org/10.1109/test.2004.1386981","mag":"1592824829"},"language":"en","primary_location":{"id":"doi:10.1109/test.2004.1386981","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2004.1386981","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2004 International Conferce on Test","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5061006452","display_name":"Vivek Chickermane","orcid":"https://orcid.org/0000-0003-1232-470X"},"institutions":[{"id":"https://openalex.org/I66217453","display_name":"Cadence Design Systems (United States)","ror":"https://ror.org/04w8xa018","country_code":"US","type":"company","lineage":["https://openalex.org/I66217453"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"V. Chickermane","raw_affiliation_strings":["Cadence Design Systems, Inc., Endicott, NY, USA","Cadence Design Systems, Endicott, NY, USA"],"affiliations":[{"raw_affiliation_string":"Cadence Design Systems, Inc., Endicott, NY, USA","institution_ids":["https://openalex.org/I66217453"]},{"raw_affiliation_string":"Cadence Design Systems, Endicott, NY, USA","institution_ids":["https://openalex.org/I66217453"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110112053","display_name":"B. E. Foutz","orcid":null},"institutions":[{"id":"https://openalex.org/I66217453","display_name":"Cadence Design Systems (United States)","ror":"https://ror.org/04w8xa018","country_code":"US","type":"company","lineage":["https://openalex.org/I66217453"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"B. Foutz","raw_affiliation_strings":["Cadence Design Systems, Inc., Endicott, NY, USA","Cadence Design Systems, Endicott, NY, USA"],"affiliations":[{"raw_affiliation_string":"Cadence Design Systems, Inc., Endicott, NY, USA","institution_ids":["https://openalex.org/I66217453"]},{"raw_affiliation_string":"Cadence Design Systems, Endicott, NY, USA","institution_ids":["https://openalex.org/I66217453"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5006214290","display_name":"Brion Keller","orcid":null},"institutions":[{"id":"https://openalex.org/I66217453","display_name":"Cadence Design Systems (United States)","ror":"https://ror.org/04w8xa018","country_code":"US","type":"company","lineage":["https://openalex.org/I66217453"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"B. Keller","raw_affiliation_strings":["Cadence Design Systems, Inc., Endicott, NY, USA","Cadence Design Systems, Endicott, NY, USA"],"affiliations":[{"raw_affiliation_string":"Cadence Design Systems, Inc., Endicott, NY, USA","institution_ids":["https://openalex.org/I66217453"]},{"raw_affiliation_string":"Cadence Design Systems, Endicott, NY, USA","institution_ids":["https://openalex.org/I66217453"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5061006452"],"corresponding_institution_ids":["https://openalex.org/I66217453"],"apc_list":null,"apc_paid":null,"fwci":14.7772,"has_fulltext":false,"cited_by_count":121,"citation_normalized_percentile":{"value":0.99320288,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"452","last_page":"461"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9927999973297119,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/masking","display_name":"Masking (illustration)","score":0.84504234790802},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.708922266960144},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.5829265117645264},{"id":"https://openalex.org/keywords/compression","display_name":"Compression (physics)","score":0.5403253436088562},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4947611689567566},{"id":"https://openalex.org/keywords/test-compression","display_name":"Test compression","score":0.4723571240901947},{"id":"https://openalex.org/keywords/data-compression","display_name":"Data compression","score":0.46877020597457886},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4280424118041992},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.4230755567550659},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3873315751552582},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.3861619532108307},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.34142765402793884},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.32111480832099915},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.1955127716064453},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.18270233273506165},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.1743442714214325},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17051944136619568},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.13393628597259521},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.10274848341941833},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.06625056266784668}],"concepts":[{"id":"https://openalex.org/C2777402240","wikidata":"https://www.wikidata.org/wiki/Q6783436","display_name":"Masking (illustration)","level":2,"score":0.84504234790802},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.708922266960144},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.5829265117645264},{"id":"https://openalex.org/C180016635","wikidata":"https://www.wikidata.org/wiki/Q2712821","display_name":"Compression (physics)","level":2,"score":0.5403253436088562},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4947611689567566},{"id":"https://openalex.org/C29652920","wikidata":"https://www.wikidata.org/wiki/Q7705757","display_name":"Test compression","level":4,"score":0.4723571240901947},{"id":"https://openalex.org/C78548338","wikidata":"https://www.wikidata.org/wiki/Q2493","display_name":"Data compression","level":2,"score":0.46877020597457886},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4280424118041992},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.4230755567550659},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3873315751552582},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.3861619532108307},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.34142765402793884},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.32111480832099915},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.1955127716064453},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.18270233273506165},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.1743442714214325},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17051944136619568},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.13393628597259521},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.10274848341941833},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.06625056266784668},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/test.2004.1386981","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2004.1386981","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2004 International Conferce on Test","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.110.2708","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.110.2708","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.itcprogramdev.org/itc2004proc/papers/pdfs/0015_3.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W197391467","https://openalex.org/W1484351771","https://openalex.org/W1590110141","https://openalex.org/W1763985980","https://openalex.org/W1863819993","https://openalex.org/W1905213452","https://openalex.org/W1985440524","https://openalex.org/W2094036808","https://openalex.org/W2099814124","https://openalex.org/W2105282021","https://openalex.org/W2134998505","https://openalex.org/W2139009001","https://openalex.org/W2140283778","https://openalex.org/W2168755502","https://openalex.org/W2169449309","https://openalex.org/W2245818529","https://openalex.org/W6607990715"],"related_works":["https://openalex.org/W4285708951","https://openalex.org/W1979305473","https://openalex.org/W2543176856","https://openalex.org/W2157212570","https://openalex.org/W3088373974","https://openalex.org/W2624668974","https://openalex.org/W2806771822","https://openalex.org/W4230966676","https://openalex.org/W2799101079","https://openalex.org/W2111803469"],"abstract_inverted_index":{"The":[0],"effectiveness":[1,81],"of":[2,12,48,55],"on-product":[3],"test":[4,38],"compression":[5,39],"methods":[6,40],"is":[7],"degraded":[8],"by":[9,17],"the":[10,18,34,56,61],"capture":[11],"unknown":[13],"logic":[14],"states":[15],"(\"X-states\")":[16],"scan":[19],"elements.":[20],"This":[21],"work":[22],"describes":[23],"a":[24,46,71],"simple":[25],"but":[26],"cost-effective":[27],"solution":[28],"called":[29],"channel":[30,57],"masking":[31,58],"that":[32],"masks":[33],"X-states":[35],"and":[36,60,63],"allows":[37],"to":[41,66,78],"be":[42],"widely":[43],"deployed":[44],"on":[45,82],"variety":[47],"designs.":[49,86],"It":[50],"also":[51],"discusses":[52],"various":[53],"aspects":[54],"hardware":[59],"synthesis":[62],"validation":[64],"methodology":[65],"support":[67],"its":[68,80],"use":[69],"in":[70],"typical":[72],"design":[73],"flow.":[74],"Results":[75],"are":[76],"presented":[77],"show":[79],"some":[83],"large":[84],"industrial":[85]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":4},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":5},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":4},{"year":2012,"cited_by_count":6}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
