{"id":"https://openalex.org/W2167428122","doi":"https://doi.org/10.1109/test.2003.1270884","title":"A scalable scan-path test point insertion technique to enhance delay fault coverage for standard scan designs","display_name":"A scalable scan-path test point insertion technique to enhance delay fault coverage for standard scan designs","publication_year":2004,"publication_date":"2004-07-08","ids":{"openalex":"https://openalex.org/W2167428122","doi":"https://doi.org/10.1109/test.2003.1270884","mag":"2167428122"},"language":"en","primary_location":{"id":"doi:10.1109/test.2003.1270884","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2003.1270884","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Test Conference, 2003. Proceedings. ITC 2003.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5088782369","display_name":"Seongmoon Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Seongmoon Wang","raw_affiliation_strings":["NEC Laboratories, Princeton, NJ, USA"],"affiliations":[{"raw_affiliation_string":"NEC Laboratories, Princeton, NJ, USA","institution_ids":["https://openalex.org/I20089843"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5042424184","display_name":"Srimat Chakradhar","orcid":"https://orcid.org/0000-0003-3530-3901"},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S.T. Chakradhar","raw_affiliation_strings":["NEC Laboratories, Princeton, NJ, USA"],"affiliations":[{"raw_affiliation_string":"NEC Laboratories, Princeton, NJ, USA","institution_ids":["https://openalex.org/I20089843"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5088782369"],"corresponding_institution_ids":["https://openalex.org/I20089843"],"apc_list":null,"apc_paid":null,"fwci":1.8431,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.8558006,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"1","issue":null,"first_page":"574","last_page":"583"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9927999973297119,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.696645200252533},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6302327513694763},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5496115684509277},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.5479729175567627},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.54521644115448},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.543897807598114},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.46735668182373047},{"id":"https://openalex.org/keywords/test","display_name":"Test (biology)","score":0.4646448791027069},{"id":"https://openalex.org/keywords/point","display_name":"Point (geometry)","score":0.440354585647583},{"id":"https://openalex.org/keywords/boundary-scan","display_name":"Boundary scan","score":0.43975815176963806},{"id":"https://openalex.org/keywords/code-coverage","display_name":"Code coverage","score":0.4290487766265869},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3985886573791504},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.39163723587989807},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18267026543617249},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.10666176676750183},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.09711748361587524},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.09674263000488281},{"id":"https://openalex.org/keywords/testability","display_name":"Testability","score":0.09490782022476196},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.08964905142784119},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.07188084721565247},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.07058921456336975}],"concepts":[{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.696645200252533},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6302327513694763},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5496115684509277},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.5479729175567627},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.54521644115448},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.543897807598114},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.46735668182373047},{"id":"https://openalex.org/C2777267654","wikidata":"https://www.wikidata.org/wiki/Q3519023","display_name":"Test (biology)","level":2,"score":0.4646448791027069},{"id":"https://openalex.org/C28719098","wikidata":"https://www.wikidata.org/wiki/Q44946","display_name":"Point (geometry)","level":2,"score":0.440354585647583},{"id":"https://openalex.org/C992767","wikidata":"https://www.wikidata.org/wiki/Q895156","display_name":"Boundary scan","level":3,"score":0.43975815176963806},{"id":"https://openalex.org/C53942775","wikidata":"https://www.wikidata.org/wiki/Q1211721","display_name":"Code coverage","level":3,"score":0.4290487766265869},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3985886573791504},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.39163723587989807},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18267026543617249},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.10666176676750183},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.09711748361587524},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.09674263000488281},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.09490782022476196},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.08964905142784119},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.07188084721565247},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.07058921456336975},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/test.2003.1270884","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2003.1270884","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Test Conference, 2003. Proceedings. ITC 2003.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W13277579","https://openalex.org/W1516404362","https://openalex.org/W1581327216","https://openalex.org/W1977294468","https://openalex.org/W2028504835","https://openalex.org/W2039231278","https://openalex.org/W2061946964","https://openalex.org/W2096146619","https://openalex.org/W2103810183","https://openalex.org/W2106303764","https://openalex.org/W2110164501","https://openalex.org/W2118133071","https://openalex.org/W2118744758","https://openalex.org/W2121258817","https://openalex.org/W2126641963","https://openalex.org/W2133913685","https://openalex.org/W2149107969","https://openalex.org/W2149602237","https://openalex.org/W2162874773","https://openalex.org/W6600530048","https://openalex.org/W6660361362"],"related_works":["https://openalex.org/W2098533503","https://openalex.org/W2543176856","https://openalex.org/W2021253405","https://openalex.org/W2535245920","https://openalex.org/W4230966676","https://openalex.org/W2111803469","https://openalex.org/W2165948443","https://openalex.org/W2550015578","https://openalex.org/W1969425693","https://openalex.org/W1975544287"],"abstract_inverted_index":{"In":[0,23],"this":[1],"paper,an":[2],"automatic":[3],"test":[4,9,48,81,94,135],"pattern":[5],"generator":[6],"(ATPG)-based":[7],"scan-path":[8],"point":[10,167],"insertion":[11],"technique,which":[12],"can":[13,50,101],"achieve":[14],"high":[15],"delay":[16,35,115,169],"fault":[17,87],"coverage":[18,116],"for":[19,119,155],"scan":[20,31,43,77,142,160],"designs,is":[21],"proposed.":[22],"the":[24,41,90,152],"proposed":[25,66,91,153],"technique,the":[26],"shift":[27],"dependency":[28],"between":[29,79],"adjacent":[30,76],"flip-flops,which":[32],"causes":[33],"some":[34],"faults":[36],"to":[37,72,85,107],"be":[38,51],"untestable":[39],"in":[40,63,141],"standard":[42],"environment,is":[44],"broken":[45],"by":[46,151],"inserting":[47],"points,which":[49],"combinational":[52],"gates":[53],"as":[54,56],"well":[55],"flip-flops.":[57],"Instead":[58],"of":[59,75,134],"topology-based":[60,109],"approaches":[61],"used":[62],"prior":[64,147],"publications,the":[65],"technique":[67,92],"uses":[68],"a":[69,146],"special":[70],"ATPG":[71],"identify":[73],"pairs":[74],"flip-flops":[78],"which":[80],"points":[82,95],"are":[83,99],"inserted":[84],"improve":[86],"coverage.":[88],"Since":[89],"inserts":[93],"only":[96],"where":[97],"they":[98],"necessary,it":[100],"drastically":[102],"reduce":[103],"hardware":[104],"overhead":[105],"compared":[106],"circuit":[108],"techniques.":[110],"One":[111],"hundred":[112],"percent":[113],"transition":[114],"was":[117,149],"attained":[118],"all":[120],"ISCAS":[121],"89":[122],"benchmark":[123,156],"circuits":[124,157],"except":[125],"one.":[126],"This":[127],"is":[128],"achieved":[129,150],"with":[130,158],"very":[131],"small":[132],"numbers":[133],"points.":[136],"On":[137],"average,about":[138],"40%":[139],"reduction":[140],"chain":[143,161],"length":[144],"against":[145],"approach":[148],"method":[154],"default":[159],"order.":[162],"Index":[163],"Terms\u2014Delay":[164],"fault,scan":[165],"testing,test":[166],"insertion,transition":[168],"fault.":[170]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
