{"id":"https://openalex.org/W2099435571","doi":"https://doi.org/10.1109/test.2003.1270850","title":"Efficient sequential atpg based on partitioned finite-state-machine traversal","display_name":"Efficient sequential atpg based on partitioned finite-state-machine traversal","publication_year":2004,"publication_date":"2004-07-08","ids":{"openalex":"https://openalex.org/W2099435571","doi":"https://doi.org/10.1109/test.2003.1270850","mag":"2099435571"},"language":"en","primary_location":{"id":"doi:10.1109/test.2003.1270850","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2003.1270850","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Test Conference, 2003. Proceedings. ITC 2003.","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111881293","display_name":"Qingwei Wu","orcid":null},"institutions":[{"id":"https://openalex.org/I859038795","display_name":"Virginia Tech","ror":"https://ror.org/02smfhw86","country_code":"US","type":"education","lineage":["https://openalex.org/I859038795"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Qingwei Wu","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Virginia Polytechnic Institute and State University, Blacksburg, VA, USA","Virginia Tech"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Virginia Polytechnic Institute and State University, Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]},{"raw_affiliation_string":"Virginia Tech","institution_ids":["https://openalex.org/I859038795"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5108516165","display_name":"Michael S. Hsiao","orcid":null},"institutions":[{"id":"https://openalex.org/I859038795","display_name":"Virginia Tech","ror":"https://ror.org/02smfhw86","country_code":"US","type":"education","lineage":["https://openalex.org/I859038795"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M.S. Hsiao","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Virginia Polytechnic Institute and State University, Blacksburg, VA, USA","Virginia Tech"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Virginia Polytechnic Institute and State University, Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]},{"raw_affiliation_string":"Virginia Tech","institution_ids":["https://openalex.org/I859038795"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I859038795"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"1","issue":null,"first_page":"281","last_page":"289"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10743","display_name":"Software Testing and Debugging Techniques","score":0.993399977684021,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/tree-traversal","display_name":"Tree traversal","score":0.8848182559013367},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7535938024520874},{"id":"https://openalex.org/keywords/finite-state-machine","display_name":"Finite-state machine","score":0.6527547240257263},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.6515750885009766},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5371056199073792},{"id":"https://openalex.org/keywords/state","display_name":"State (computer science)","score":0.5172327160835266},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.37494176626205444},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3465002775192261},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13361653685569763}],"concepts":[{"id":"https://openalex.org/C140745168","wikidata":"https://www.wikidata.org/wiki/Q1210082","display_name":"Tree traversal","level":2,"score":0.8848182559013367},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7535938024520874},{"id":"https://openalex.org/C167822520","wikidata":"https://www.wikidata.org/wiki/Q176452","display_name":"Finite-state machine","level":2,"score":0.6527547240257263},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.6515750885009766},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5371056199073792},{"id":"https://openalex.org/C48103436","wikidata":"https://www.wikidata.org/wiki/Q599031","display_name":"State (computer science)","level":2,"score":0.5172327160835266},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.37494176626205444},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3465002775192261},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13361653685569763},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/test.2003.1270850","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2003.1270850","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Test Conference, 2003. Proceedings. ITC 2003.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1760199343","https://openalex.org/W1899456488","https://openalex.org/W1972289445","https://openalex.org/W2038192686","https://openalex.org/W2112748651","https://openalex.org/W2135931142","https://openalex.org/W2141396628","https://openalex.org/W2142015172","https://openalex.org/W2143744297","https://openalex.org/W2148757937","https://openalex.org/W2152406824","https://openalex.org/W2155298431","https://openalex.org/W2169984427","https://openalex.org/W2170418452","https://openalex.org/W2537095701","https://openalex.org/W3016023799"],"related_works":["https://openalex.org/W2136735429","https://openalex.org/W170547082","https://openalex.org/W2587876411","https://openalex.org/W2358332176","https://openalex.org/W4229950834","https://openalex.org/W4301044568","https://openalex.org/W2128075414","https://openalex.org/W1983064190","https://openalex.org/W4214727065","https://openalex.org/W1232590083"],"abstract_inverted_index":{"We":[0,92],"present":[1],"a":[2,149,178],"new":[3,19],"automatic":[4],"test":[5,194],"pattern":[6],"generation":[7],"algorithm":[8],"for":[9,49,56,98,110,164],"sequential":[10,167,199],"circuits":[11],"by":[12],"traversing":[13],"the":[14,62,66,72,75,78,89,96,99,108,111,115,135,141,180],"partitioned":[15,159],"state":[16,24,32,40,51,57,67,90,153],"spaces.":[17],"The":[18],"features":[20],"include:":[21],"(1)":[22],"nondisjoint":[23],"groups":[25,33],"are":[26,44,59,102],"obtained":[27],"such":[28],"that":[29,101],"two":[30],"different":[31],"may":[34],"have":[35,204],"common":[36],"flip-flops,":[37],"(2)":[38],"partial":[39,126],"transition":[41],"graphs":[42],"(STGs)":[43],"constructed":[45],"at":[46],"run":[47],"time":[48,182],"each":[50,125],"group,":[52],"(3)":[53],"spectral":[54,63],"information":[55,64,82],"variables":[58,68],"extracted":[60],"and":[61,114,122,132],"of":[65,74,106,143,158],"helps":[69],"to":[70,86,118,140],"identify":[71],"behavior":[73],"flip-flops":[76,100],"in":[77,174],"frequency":[79],"domain.":[80],"This":[81],"will":[83],"help":[84],"us":[85],"intelligently":[87],"partition":[88],"space.":[91],"focus":[93],"only":[94],"on":[95],"STGs":[97,160],"grouped":[103],"together":[104],"instead":[105],"building":[107],"STG":[109],"entire":[112],"circuit,":[113],"ATPG":[116],"tries":[117],"traverse":[119],"all":[120],"states":[121,130],"transitions":[123],"within":[124],"STG.":[127],"By":[128],"exercising":[129],"visited":[131],"arcs":[133],"traversed,":[134],"vectors":[136],"generated":[137],"often":[138],"lead":[139],"detection":[142],"hard":[144],"faults.":[145],"Since":[146],"we":[147],"limit":[148],"maximum":[150],"size":[151],"any":[152],"group":[154],"can":[155],"be,":[156],"construction":[157],"is":[161,172,183],"feasible":[162],"even":[163],"very":[165],"large":[166,198],"circuits.":[168],"Only":[169],"logic":[170],"simulation":[171],"needed":[173],"our":[175],"ATPG;":[176],"as":[177],"result,":[179],"execution":[181],"greatly":[184],"reduced":[185],"while":[186],"achieving":[187],"high":[188],"fault":[189,202],"coverages":[190,203],"compared":[191],"with":[192],"other":[193],"generators.":[195],"For":[196],"some":[197],"circuits,":[200],"highest":[201],"been":[205],"achieved.":[206]},"counts_by_year":[{"year":2015,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
