{"id":"https://openalex.org/W1571368864","doi":"https://doi.org/10.1109/test.2002.1041927","title":"Testing highly integrated wireless circuits and systems with low cost tester: how to overcome the challenge?","display_name":"Testing highly integrated wireless circuits and systems with low cost tester: how to overcome the challenge?","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W1571368864","doi":"https://doi.org/10.1109/test.2002.1041927","mag":"1571368864"},"language":"en","primary_location":{"id":"doi:10.1109/test.2002.1041927","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2002.1041927","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. International Test Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5021847892","display_name":"Mohamed Slamani","orcid":"https://orcid.org/0000-0002-2361-4588"},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"M. Slamani","raw_affiliation_strings":["Wireless Test Development Group, IBM, Essex Junction, VT, USA","Wireless Test Dev. Group, IBM, Essex Junction, VT, USA"],"affiliations":[{"raw_affiliation_string":"Wireless Test Development Group, IBM, Essex Junction, VT, USA","institution_ids":[]},{"raw_affiliation_string":"Wireless Test Dev. Group, IBM, Essex Junction, VT, USA","institution_ids":["https://openalex.org/I1341412227"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5021847892"],"corresponding_institution_ids":["https://openalex.org/I1341412227"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.05728203,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1225","last_page":"1225"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13293","display_name":"Engineering and Test Systems","score":0.9765999913215637,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9692000150680542,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/upgrade","display_name":"Upgrade","score":0.7970572710037231},{"id":"https://openalex.org/keywords/cover","display_name":"Cover (algebra)","score":0.6568120121955872},{"id":"https://openalex.org/keywords/automatic-test-equipment","display_name":"Automatic test equipment","score":0.5932259559631348},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5511811971664429},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.5147280693054199},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4991755485534668},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.48902520537376404},{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.4787294566631317},{"id":"https://openalex.org/keywords/measure","display_name":"Measure (data warehouse)","score":0.46459007263183594},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.4619574546813965},{"id":"https://openalex.org/keywords/system-testing","display_name":"System testing","score":0.4617709219455719},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.4465368986129761},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.4279947876930237},{"id":"https://openalex.org/keywords/printed-circuit-board","display_name":"Printed circuit board","score":0.42526885867118835},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.41419893503189087},{"id":"https://openalex.org/keywords/time-to-market","display_name":"Time to market","score":0.4139552712440491},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.39446473121643066},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3844834864139557},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.37725070118904114},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.24574145674705505},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.189906507730484}],"concepts":[{"id":"https://openalex.org/C2780615140","wikidata":"https://www.wikidata.org/wiki/Q920419","display_name":"Upgrade","level":2,"score":0.7970572710037231},{"id":"https://openalex.org/C2780428219","wikidata":"https://www.wikidata.org/wiki/Q16952335","display_name":"Cover (algebra)","level":2,"score":0.6568120121955872},{"id":"https://openalex.org/C141842801","wikidata":"https://www.wikidata.org/wiki/Q363815","display_name":"Automatic test equipment","level":3,"score":0.5932259559631348},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5511811971664429},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.5147280693054199},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4991755485534668},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.48902520537376404},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.4787294566631317},{"id":"https://openalex.org/C2780009758","wikidata":"https://www.wikidata.org/wiki/Q6804172","display_name":"Measure (data warehouse)","level":2,"score":0.46459007263183594},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.4619574546813965},{"id":"https://openalex.org/C7166840","wikidata":"https://www.wikidata.org/wiki/Q1199682","display_name":"System testing","level":2,"score":0.4617709219455719},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.4465368986129761},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.4279947876930237},{"id":"https://openalex.org/C120793396","wikidata":"https://www.wikidata.org/wiki/Q173350","display_name":"Printed circuit board","level":2,"score":0.42526885867118835},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.41419893503189087},{"id":"https://openalex.org/C2779229675","wikidata":"https://www.wikidata.org/wiki/Q445235","display_name":"Time to market","level":2,"score":0.4139552712440491},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.39446473121643066},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3844834864139557},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.37725070118904114},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.24574145674705505},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.189906507730484},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/test.2002.1041927","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2002.1041927","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. International Test Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.49000000953674316,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W1901574727","https://openalex.org/W2146381271","https://openalex.org/W2035101737","https://openalex.org/W1646128378","https://openalex.org/W1846623049","https://openalex.org/W2165948443","https://openalex.org/W2149724644","https://openalex.org/W1688196005","https://openalex.org/W2112983903","https://openalex.org/W2377850316"],"abstract_inverted_index":{"The":[0,14,121],"expensive":[1],"ATE":[2],"platform":[3],"is":[4,17,65,114],"very":[5],"flexible":[6,115],"and":[7,108,116],"adequate":[8],"for":[9,59,96,123],"complex":[10],"devices":[11,131],"but":[12],"costly.":[13],"upgrade":[15],"cost":[16,41],"high":[18],"enough":[19],"if":[20],"we":[21,101],"like":[22],"to":[23,37,69,84,88],"cover":[24,70],"a":[25,42,71,133,137],"wide":[26,72],"range":[27,73],"of":[28,45,74,104,129],"applications.":[29],"We":[30],"debate":[31],"the":[32,39,46,57,62,66,77,105,111],"best":[33],"strategy":[34],"in":[35,76,132],"order":[36],"keep":[38],"test":[40,60,79,97,124],"small":[43],"fraction":[44],"total":[47],"RF":[48,106,130],"IC":[49],"cost.":[50],"This":[51],"panel":[52],"will":[53],"focus":[54],"on":[55],"how":[56],"design":[58,95,122],"at":[61,98],"board":[63,99],"level":[64,100],"key":[67],"solution":[68],"applications":[75],"same":[78],"platform.":[80],"It":[81,113],"allows":[82],"one":[83],"measure":[85,89],"parameters":[86],"impossible":[87],"with":[90,110],"existing":[91],"ATE.":[92],"By":[93],"using":[94],"avoid":[102],"modification":[103],"chip":[107],"confrontation":[109],"designer.":[112],"application":[117],"or":[118,136],"product":[119],"oriented.":[120],"can":[125],"even":[126],"allow":[127],"testing":[128],"mixed":[134],"signal":[135],"digital":[138],"tester.":[139]},"counts_by_year":[{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}