{"id":"https://openalex.org/W1652148641","doi":"https://doi.org/10.1109/test.2002.1041925","title":"Selective optimization of test for embedded flash memory","display_name":"Selective optimization of test for embedded flash memory","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W1652148641","doi":"https://doi.org/10.1109/test.2002.1041925","mag":"1652148641"},"language":"en","primary_location":{"id":"doi:10.1109/test.2002.1041925","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2002.1041925","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. International Test Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5086400382","display_name":"R. Barth","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"R. Barth","raw_affiliation_strings":["Intel Corporation, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5086400382"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":0.5031,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.63633707,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1222","last_page":"1222"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9764999747276306,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9764999747276306,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11749","display_name":"Iterative Learning Control Systems","score":0.9728000164031982,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13293","display_name":"Engineering and Test Systems","score":0.9472000002861023,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/flash-memory-emulator","display_name":"Flash memory emulator","score":0.8047478199005127},{"id":"https://openalex.org/keywords/boundary-scan","display_name":"Boundary scan","score":0.756033182144165},{"id":"https://openalex.org/keywords/flash-memory","display_name":"Flash memory","score":0.7480309009552002},{"id":"https://openalex.org/keywords/flash","display_name":"Flash (photography)","score":0.7103878259658813},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6425985097885132},{"id":"https://openalex.org/keywords/test","display_name":"Test (biology)","score":0.5402898192405701},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5053072571754456},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4695133864879608},{"id":"https://openalex.org/keywords/universal-memory","display_name":"Universal memory","score":0.4489181339740753},{"id":"https://openalex.org/keywords/test-compression","display_name":"Test compression","score":0.43945980072021484},{"id":"https://openalex.org/keywords/memory-test","display_name":"Memory test","score":0.4154531955718994},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.3765922486782074},{"id":"https://openalex.org/keywords/flash-file-system","display_name":"Flash file system","score":0.3390289545059204},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.29743388295173645},{"id":"https://openalex.org/keywords/computer-memory","display_name":"Computer memory","score":0.27570486068725586},{"id":"https://openalex.org/keywords/memory-refresh","display_name":"Memory refresh","score":0.1987808644771576},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1722312569618225},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12703391909599304},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.11797046661376953}],"concepts":[{"id":"https://openalex.org/C96535780","wikidata":"https://www.wikidata.org/wiki/Q5457561","display_name":"Flash memory emulator","level":5,"score":0.8047478199005127},{"id":"https://openalex.org/C992767","wikidata":"https://www.wikidata.org/wiki/Q895156","display_name":"Boundary scan","level":3,"score":0.756033182144165},{"id":"https://openalex.org/C2776531357","wikidata":"https://www.wikidata.org/wiki/Q174077","display_name":"Flash memory","level":2,"score":0.7480309009552002},{"id":"https://openalex.org/C2777526259","wikidata":"https://www.wikidata.org/wiki/Q221836","display_name":"Flash (photography)","level":2,"score":0.7103878259658813},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6425985097885132},{"id":"https://openalex.org/C2777267654","wikidata":"https://www.wikidata.org/wiki/Q3519023","display_name":"Test (biology)","level":2,"score":0.5402898192405701},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5053072571754456},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4695133864879608},{"id":"https://openalex.org/C195053848","wikidata":"https://www.wikidata.org/wiki/Q7894141","display_name":"Universal memory","level":5,"score":0.4489181339740753},{"id":"https://openalex.org/C29652920","wikidata":"https://www.wikidata.org/wiki/Q7705757","display_name":"Test compression","level":4,"score":0.43945980072021484},{"id":"https://openalex.org/C3017990537","wikidata":"https://www.wikidata.org/wiki/Q6815759","display_name":"Memory test","level":3,"score":0.4154531955718994},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.3765922486782074},{"id":"https://openalex.org/C27670709","wikidata":"https://www.wikidata.org/wiki/Q5457555","display_name":"Flash file system","level":4,"score":0.3390289545059204},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.29743388295173645},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.27570486068725586},{"id":"https://openalex.org/C87907426","wikidata":"https://www.wikidata.org/wiki/Q6815755","display_name":"Memory refresh","level":4,"score":0.1987808644771576},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1722312569618225},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12703391909599304},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.11797046661376953},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C169760540","wikidata":"https://www.wikidata.org/wiki/Q207011","display_name":"Neuroscience","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C169900460","wikidata":"https://www.wikidata.org/wiki/Q2200417","display_name":"Cognition","level":2,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/test.2002.1041925","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2002.1041925","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. International Test Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2156162151","https://openalex.org/W2127184179","https://openalex.org/W1652148641","https://openalex.org/W1991667530","https://openalex.org/W2888456858","https://openalex.org/W2098411556","https://openalex.org/W2081788920","https://openalex.org/W2125077617","https://openalex.org/W2131198212","https://openalex.org/W2159919870"],"abstract_inverted_index":{"Testing":[0],"of":[1,66],"embedded":[2],"flash":[3,44,68],"can":[4,54],"be":[5],"performed":[6],"cost":[7],"effectively":[8],"in":[9],"a":[10],"high":[11],"volume":[12],"commodity":[13],"environment":[14],"assuming":[15],"a)":[16],"the":[17,30,41,52],"chip":[18],"is":[19],"designed":[20],"to":[21,63],"support":[22],"DAT":[23],"(direct":[24],"access":[25],"test)":[26],"for":[27],"flash;":[28],"b)":[29],"design":[31],"supports":[32,43],"full":[33],"structural":[34],"scan":[35,38,48,58],"and":[36,47,50,60],"boundary":[37],"test;":[39,49],"c)":[40],"tester":[42,53],"memory":[45,61],"test":[46,59,62,69],"d)":[51],"run":[55],"concurrent":[56],"scan/boundary":[57],"make":[64],"use":[65],"long":[67],"time.":[70]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}