{"id":"https://openalex.org/W1884658820","doi":"https://doi.org/10.1109/test.2002.1041875","title":"Adapting an SoC to ATE concurrent test capabilities","display_name":"Adapting an SoC to ATE concurrent test capabilities","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W1884658820","doi":"https://doi.org/10.1109/test.2002.1041875","mag":"1884658820"},"language":"en","primary_location":{"id":"doi:10.1109/test.2002.1041875","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2002.1041875","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. International Test Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036396004","display_name":"Rainer Dorsch","orcid":null},"institutions":[{"id":"https://openalex.org/I100066346","display_name":"University of Stuttgart","ror":"https://ror.org/04vnq7t77","country_code":"DE","type":"education","lineage":["https://openalex.org/I100066346"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"R. Dorsch","raw_affiliation_strings":["Computer Architecture Laboratory, University of Stuttgart, Germany","Comput. Archit. Lab., Stuttgart Univ., Germany"],"affiliations":[{"raw_affiliation_string":"Computer Architecture Laboratory, University of Stuttgart, Germany","institution_ids":["https://openalex.org/I100066346"]},{"raw_affiliation_string":"Comput. Archit. Lab., Stuttgart Univ., Germany","institution_ids":["https://openalex.org/I100066346"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078039379","display_name":"R.H. Rivera","orcid":null},"institutions":[{"id":"https://openalex.org/I100066346","display_name":"University of Stuttgart","ror":"https://ror.org/04vnq7t77","country_code":"DE","type":"education","lineage":["https://openalex.org/I100066346"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"R.H. Rivera","raw_affiliation_strings":["Computer Architecture Laboratory, University of Stuttgart, Germany","Comput. Archit. Lab., Stuttgart Univ., Germany"],"affiliations":[{"raw_affiliation_string":"Computer Architecture Laboratory, University of Stuttgart, Germany","institution_ids":["https://openalex.org/I100066346"]},{"raw_affiliation_string":"Comput. Archit. Lab., Stuttgart Univ., Germany","institution_ids":["https://openalex.org/I100066346"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008775226","display_name":"Hans-Joachim Wunderlich","orcid":"https://orcid.org/0000-0003-4536-8290"},"institutions":[{"id":"https://openalex.org/I100066346","display_name":"University of Stuttgart","ror":"https://ror.org/04vnq7t77","country_code":"DE","type":"education","lineage":["https://openalex.org/I100066346"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"H.J. Wunderlich","raw_affiliation_strings":["Computer Architecture Laboratory, University of Stuttgart, Germany","Comput. Archit. Lab., Stuttgart Univ., Germany"],"affiliations":[{"raw_affiliation_string":"Computer Architecture Laboratory, University of Stuttgart, Germany","institution_ids":["https://openalex.org/I100066346"]},{"raw_affiliation_string":"Comput. Archit. Lab., Stuttgart Univ., Germany","institution_ids":["https://openalex.org/I100066346"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074104337","display_name":"Mark Fischer","orcid":"https://orcid.org/0000-0002-6184-9505"},"institutions":[{"id":"https://openalex.org/I138285227","display_name":"Agilent Technologies (United States)","ror":"https://ror.org/02tryst02","country_code":"US","type":"company","lineage":["https://openalex.org/I138285227"]},{"id":"https://openalex.org/I4210129668","display_name":"Agilent Technologies (Germany)","ror":"https://ror.org/0355p2e87","country_code":"DE","type":"company","lineage":["https://openalex.org/I138285227","https://openalex.org/I4210129668"]}],"countries":["DE","US"],"is_corresponding":false,"raw_author_name":"M. Fischer","raw_affiliation_strings":["Agilent Technologies, Inc., Boblingen, Germany","[Agilent Technologies"],"affiliations":[{"raw_affiliation_string":"Agilent Technologies, Inc., Boblingen, Germany","institution_ids":["https://openalex.org/I4210129668"]},{"raw_affiliation_string":"[Agilent Technologies","institution_ids":["https://openalex.org/I138285227"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5036396004"],"corresponding_institution_ids":["https://openalex.org/I100066346"],"apc_list":null,"apc_paid":null,"fwci":2.4734,"has_fulltext":false,"cited_by_count":25,"citation_normalized_percentile":{"value":0.88995886,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1169","last_page":"1175"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13293","display_name":"Engineering and Test Systems","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7003911137580872},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6802736520767212},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.5894018411636353},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.523193359375},{"id":"https://openalex.org/keywords/test","display_name":"Test (biology)","score":0.5156599283218384},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.49469611048698425},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.4432537257671356},{"id":"https://openalex.org/keywords/concurrent-engineering","display_name":"Concurrent engineering","score":0.4263409376144409},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.35462185740470886},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.30188676714897156},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19222861528396606}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7003911137580872},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6802736520767212},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.5894018411636353},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.523193359375},{"id":"https://openalex.org/C2777267654","wikidata":"https://www.wikidata.org/wiki/Q3519023","display_name":"Test (biology)","level":2,"score":0.5156599283218384},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.49469611048698425},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.4432537257671356},{"id":"https://openalex.org/C78382760","wikidata":"https://www.wikidata.org/wiki/Q2288649","display_name":"Concurrent engineering","level":3,"score":0.4263409376144409},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.35462185740470886},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.30188676714897156},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19222861528396606},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C54725748","wikidata":"https://www.wikidata.org/wiki/Q7247277","display_name":"Process integration","level":2,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C21880701","wikidata":"https://www.wikidata.org/wiki/Q2144042","display_name":"Process engineering","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/test.2002.1041875","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2002.1041875","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. International Test Conference","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.71.6285","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.71.6285","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.iti.uni-stuttgart.de/papers/pdf/ITC41-2.pdf","raw_type":"text"},{"id":"pmh:oai:informatik.uni-stuttgart.de:INPROC-2002-43","is_oa":false,"landing_page_url":"http://www2.informatik.uni-stuttgart.de/cgi-bin/NCSTRL/NCSTRL_view.pl?id=INPROC-2002-43&engl=1","pdf_url":null,"source":{"id":"https://openalex.org/S4306401306","display_name":"Fachbereich Informatik (University of Stuttgart)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I100066346","host_organization_name":"University of Stuttgart","host_organization_lineage":["https://openalex.org/I100066346"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"\\n            In: Proceedings of the 33rd International Test Conference (ITC),\\n            Baltimore, MD, October 8-10, 2002, pp. 1169-1175\\n          ","raw_type":"Text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1614172680","https://openalex.org/W1924406256","https://openalex.org/W1928666065","https://openalex.org/W1931458304","https://openalex.org/W2091813975","https://openalex.org/W2104257589","https://openalex.org/W2104548962","https://openalex.org/W2108657959","https://openalex.org/W2121369342","https://openalex.org/W2138292910","https://openalex.org/W2151513752","https://openalex.org/W2152530860","https://openalex.org/W2152763367","https://openalex.org/W2160135614","https://openalex.org/W2170533364","https://openalex.org/W2503952136","https://openalex.org/W3136299071"],"related_works":["https://openalex.org/W2388040150","https://openalex.org/W4230718388","https://openalex.org/W2002682434","https://openalex.org/W2102117846","https://openalex.org/W2481546399","https://openalex.org/W3149244010","https://openalex.org/W2047284788","https://openalex.org/W2533063779","https://openalex.org/W2133408453","https://openalex.org/W1661006584"],"abstract_inverted_index":{"Concurrent":[0],"test":[1,51,63,79],"features":[2],"are":[3,19,69,80],"available":[4],"in":[5,62,73],"SoC":[6,34,58],"testers":[7],"to":[8,29],"increase":[9],"ATE":[10],"throughput.":[11],"To":[12],"exploit":[13],"these":[14,25],"new":[15],"features,":[16],"design":[17,75],"modifications":[18,26],"necessary.":[20],"In":[21],"a":[22],"case":[23],"study,":[24],"were":[27],"applied":[28],"the":[30,74],"open":[31],"source":[32],"LEON":[33,53],"platform":[35],"containing":[36],"an":[37,42,57],"embedded":[38,47],"32":[39],"bit":[40],"CPU,":[41],"AMBA":[43],"bus,":[44],"and":[45,66,71],"several":[46],"cores.":[48],"The":[49,60],"concurrent":[50,78],"of":[52],"was":[54],"performed":[55],"on":[56],"tester.":[59],"gain":[61],"application":[64],"time":[65],"area":[67],"costs":[68],"quantified":[70],"obstacles":[72],"flow":[76],"for":[77],"discussed.":[81]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}