{"id":"https://openalex.org/W1891950198","doi":"https://doi.org/10.1109/test.2002.1041810","title":"FRITS - a microprocessor functional BIST method","display_name":"FRITS - a microprocessor functional BIST method","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W1891950198","doi":"https://doi.org/10.1109/test.2002.1041810","mag":"1891950198"},"language":"en","primary_location":{"id":"doi:10.1109/test.2002.1041810","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2002.1041810","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. International Test Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5040250128","display_name":"Praveen Parvathala","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"P. Parvathala","raw_affiliation_strings":["Intel Corporation, Chandler, AZ, USA","Intel(R) Corp., Chandler, AZ, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Chandler, AZ, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel(R) Corp., Chandler, AZ, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072806383","display_name":"Kailasnath Maneparambil","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"K. Maneparambil","raw_affiliation_strings":["Intel Corporation, Chandler, AZ, USA","Intel(R) Corp., Chandler, AZ, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Chandler, AZ, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel(R) Corp., Chandler, AZ, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5017198417","display_name":"W. Lindsay","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"W. Lindsay","raw_affiliation_strings":["Intel Corporation, Chandler, AZ, USA","Intel(R) Corp., Chandler, AZ, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Chandler, AZ, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel(R) Corp., Chandler, AZ, USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5040250128"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":10.6357,"has_fulltext":false,"cited_by_count":236,"citation_normalized_percentile":{"value":0.98653702,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"590","last_page":"598"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.978600025177002,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/pentium","display_name":"Pentium","score":0.8933732509613037},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.740693986415863},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6903868317604065},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6642491817474365},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.6405631303787231},{"id":"https://openalex.org/keywords/functional-testing","display_name":"Functional testing","score":0.4683707654476166},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.43717435002326965},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.35985326766967773},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.3510107696056366},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.34494948387145996},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18455210328102112},{"id":"https://openalex.org/keywords/testability","display_name":"Testability","score":0.08115950226783752}],"concepts":[{"id":"https://openalex.org/C46268123","wikidata":"https://www.wikidata.org/wiki/Q214314","display_name":"Pentium","level":2,"score":0.8933732509613037},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.740693986415863},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6903868317604065},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6642491817474365},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.6405631303787231},{"id":"https://openalex.org/C80823478","wikidata":"https://www.wikidata.org/wiki/Q4493432","display_name":"Functional testing","level":3,"score":0.4683707654476166},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.43717435002326965},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.35985326766967773},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.3510107696056366},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.34494948387145996},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18455210328102112},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.08115950226783752}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/test.2002.1041810","is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2002.1041810","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. International Test Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.46000000834465027}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W183840133","https://openalex.org/W1487867841","https://openalex.org/W2004437077","https://openalex.org/W2055927514","https://openalex.org/W2111785162","https://openalex.org/W2112978605","https://openalex.org/W2117742043","https://openalex.org/W2121331887","https://openalex.org/W2127795505","https://openalex.org/W2133812334","https://openalex.org/W2140889374","https://openalex.org/W2152263071","https://openalex.org/W2163806624","https://openalex.org/W4238795331","https://openalex.org/W4244483404","https://openalex.org/W4245308648","https://openalex.org/W4253405466","https://openalex.org/W6684048671"],"related_works":["https://openalex.org/W1521795001","https://openalex.org/W2146381271","https://openalex.org/W2127795505","https://openalex.org/W2165948443","https://openalex.org/W2088391469","https://openalex.org/W2377850316","https://openalex.org/W1944932277","https://openalex.org/W776711554","https://openalex.org/W2617977001","https://openalex.org/W2114676663"],"abstract_inverted_index":{"This":[0,11],"paper":[1],"describes":[2],"a":[3,31,54],"novel":[4],"functional":[5,87],"Built-in-Self-Test":[6],"(BIST)":[7],"method":[8,80],"for":[9],"microprocessors.":[10],"technique":[12],"is":[13,53,83],"based":[14],"on":[15,91,111],"the":[16,48,66,74,78,100,104],"fundamental":[17],"principle":[18],"that":[19,25,64,84],"complex":[20],"chips":[21],"have":[22],"embedded":[23],"functionality":[24],"can":[26],"be":[27],"used":[28],"to":[29,46,57],"implement":[30],"comprehensive":[32],"self-test":[33],"strategy.":[34],"Functional":[35],"testing":[36,88],"has":[37],"generally":[38],"been":[39],"associated":[40],"with":[41],"expensive":[42],"testers.":[43,71,94],"In":[44],"order":[45],"lower":[47],"cost":[49,70,93],"of":[50,68,73,77,89,97],"test,":[51],"there":[52],"general":[55],"trend":[56],"adopt":[58],"structural":[59],"test":[60,79,101],"techniques":[61],"like":[62],"scan":[63],"enable":[65],"use":[67],"low":[69,92],"One":[72],"key":[75],"advantages":[76],"described":[81],"here":[82],"it":[85],"enables":[86],"microprocessors":[90,123],"Detailed":[95],"implementation":[96],"this":[98],"technique,":[99],"generation":[102],"methodology,":[103],"fault":[105],"grade":[106],"methodology":[107],"and":[108,119],"silicon":[109],"results":[110],"Intel/sup":[112],"/spl":[113,116],"reg//":[114,117],"Pentium/sup":[115],"4":[118],"Itanium/spl":[120],"trade/":[121],"family":[122],"are":[124],"presented.":[125]},"counts_by_year":[{"year":2025,"cited_by_count":8},{"year":2024,"cited_by_count":4},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":4},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":5},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":6},{"year":2016,"cited_by_count":10},{"year":2015,"cited_by_count":19},{"year":2014,"cited_by_count":17},{"year":2013,"cited_by_count":6},{"year":2012,"cited_by_count":15}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}